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MAX2832 Datasheet(PDF) 23 Page - Maxim Integrated Products |
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MAX2832 Datasheet(HTML) 23 Page - Maxim Integrated Products |
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23 / 33 page ![]() 2.4GHz to 2.5GHz 802.11g/b RF Transceiver, PA, and Rx/Tx/Antenna Diversity Switch ______________________________________________________________________________________ 23 Transmitter The transmitter integrates baseband lowpass filters, direct-upconversion mixers, a VGA, a PA driver, and a lin- ear RF PA with a power detector. A logic-high on the RXTX input (pin 48) and a logic-high on the SHDN input (pin 12) enable the transmitter. The PA outputs are routed to ANT2, regardless of the state at ANTSEL. Transmitter I/Q Baseband Inputs The differential analog inputs of the transmitter baseband amplifier I/Q inputs (TXBBI+, TXBBI-, TXBBQ+, TXBBQ-) have a differential impedance of 20k Ω || 1pF. The inputs require an input common-mode voltage of 0.9V to 1.3V, which is provided by the DC-coupled I and Q DAC out- puts of the accompanying baseband IC. Transmitter Baseband Lowpass Filtering The transmitter integrates lowpass filters that can be tuned to -3dB corner frequencies of 8MHz (11b), 11MHz (11g), 16.5MHz (turbo 1 mode), and 22.5MHz (turbo 2 mode) through programming bits D1:D0 in Register 8 (A3:A0 = 1000) and bit D5:D3 in Register 7 (A3:A0 = 0111). The -3dB corner frequency is tightly controlled on-chip and does not require user adjust- ment. Additionally, provisions are made to fine tune the -3dB corner frequency through bits D5:D3 in the Filter Programming register (A3:A0 = 0111). See Tables 9 and 10. Transmitter Variable-Gain Amplifier The variable-gain amplifier of the transmitter provides 31dB of gain control range programmable in 0.5dB steps over the top 8dB of the gain control range and in 1dB steps below that. The transmitter gain can be pro- grammed serially through the SPI interface by setting bits D5:D0 in Register 12 (A3:A0 = 1100) or in parallel through the digital logic gain-control pins B6:B1 (pins 3, 6, 8, 11, 14, 23, and 34, respectively). Set bit D10 = 0 in Register 9 (A3:A0 = 1001) to enable parallel pro- gramming, and set bit D10 = 1 to enable programming through the 3-wire serial interface. See Table 11 for the transmitter VGA gain-control settings. Table 11. Transmitter VGA Gain-Control Settings NO. D5:D0 OR B6:B1 OUTPUT SIGNAL POWER 63 111111 Max 62 111110 Max - 0.5dB 61 111101 Max - 1.0dB :: : 49 110001 Max - 7dB 48 110000 Max - 7.5dB 47 101111 Max - 8dB 46 101110 Max - 8dB 45 101101 Max - 9dB 44 101100 Max - 9dB :: : 5 000101 Max - 29dB 4 000100 Max - 29dB 3 000011 Max - 30dB 2 000010 Max - 30dB 1 000001 Max - 31dB 0 000000 Max - 31dB Table 9. Transmitter LPF Coarse -3dB Corner Frequency Settings in Register (A3:A0 = 1000) BITS (D1:D0) -3dB CORNER FREQUENCY (MHz) MODE 00 8 11b 01 11 11g 10 16.5 Turbo 1 11 22.5 Turbo 2 Table 10. Transmitter LPF Fine -3dB Corner Frequency Adjustment in Register (A3:A0 = 0111) BITS (D5:D3) % ADJUSTMENT RELATIVE TO COARSE SETTING 000 90 001 95 010 100 011 105 100 110 (11g) 101 115 101–111 Not used |
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