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PCF8531 Datasheet(PDF) 6 Page - NXP Semiconductors |
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PCF8531 Datasheet(HTML) 6 Page - NXP Semiconductors |
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6 / 51 page ![]() PCF8531 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 16 May 2011 6 of 51 NXP Semiconductors PCF8531 34 x 128 pixel matrix driver [1] Die size including saw lane of 70 μm. 6.2 Pin description Fig 4. Chip dimensions Table 4. Bonding pad dimensions Pad Size Unit pad pitch (minimum) 70 μm bump dimensions 50 × 90 × 17.5 (±3) μm wafer thickness (excluding bumps) 381 μm die size L × W 12.14 × 1.86[1] mm 001aag908 X Y L pitch W PCF8531 Table 5. Bonding pad description All x/y coordinates represent the position of the center of each pad with respect to the center (x/y = 0) of the chip (see Figure 2). Symbol Pad X ( μm) Y ( μm) Description - 1 5973.6 −821.7 dummy - 2 5969.5 823.4 - 3 5899.5 823.4 - 4 5829.5 823.4 - 5 5479.5 823.4 - 6 5409.5 823.4 - 7 5059.5 823.4 - 8 4989.5 823.4 - 9 4639.5 823.4 - 10 4569.5 823.4 - 11 4219.5 823.4 - 12 4149.5 823.4 - 13 3799.5 823.4 - 14 3729.5 823.4 OSC 15 3449.5 823.4 oscillator input [1] VLCDSENSE 16 3169.5 823.4 voltage multiplier regulation input (VLCD) [2] |
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