STM32F407IG datasheet(103/154 Pages) STMICROELECTRONICS

103 / 154 page

STM32F405xx, STM32F407xx

Electrical characteristics

Doc ID 022152 Rev 1

103/154

Figure 36.

USB OTG FS timings: definition of data signal rise and fall time

Table 55.

USB OTG FS electrical characteristics(1)

Guaranteed by design, not tested in production.

Driver characteristics

Symbol

Parameter

Conditions

Min

Max

Unit

Rise time(2)

Measured from 10% to 90% of the data signal. For more detailed informations, please refer to USB

Specification - Chapter 7 (version 2.0).

CL = 50 pF

420

Fall time(2)

CL = 50 pF

trfm

Rise/ fall time matching

tr/tf

110

VCRS

Output signal crossover voltage

1.3

2.0

Table 56.

USB FS clock timing parameters(1)(2)

Guaranteed by design, not tested in production.

TBD stands for “to be defined”.

Parameter

Symbol

Min

Nominal

Max

Unit

fHCLK value to guarantee proper operation of

USB FS interface

-TBD

MHz

AHB frequency for correct USB FS operation

14.2

MHz

Frequency (first transition)

8-bit ±10%

FSTART_8BIT

TBD

MHz

Frequency (steady state) ±500 ppm

FSTEADY

TBD

MHz

Duty cycle (first transition)

8-bit ±10%

DSTART_8BIT

TBD

Duty cycle (steady state) ±500 ppm

DSTEADY

TBD

Time to reach the steady state frequency and

duty cycle after the first transition

TSTEADY

TBD

Clock startup time after the

de-assertion of SuspendM

Peripheral

TSTART_DEV

TBD

Host

TSTART_HOST

PHY preparation time after the first transition

of the input clock

TPREP

µs

ai14137

Differen tial

data lines

VSS

VCRS

Crossover

points

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