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STM32F407IG Datasheet(PDF) 105 Page - STMicroelectronics |
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STM32F407IG Datasheet(HTML) 105 Page - STMicroelectronics |
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105 / 154 page ![]() STM32F405xx, STM32F407xx Electrical characteristics Doc ID 022152 Rev 1 105/154 Ethernet characteristics Table 60 shows the Ethernet operating voltage. Table 61 gives the list of Ethernet MAC signals for the SMI (station management interface) and Figure 38 shows the corresponding timing diagram. Figure 38. Ethernet SMI timing diagram Table 59. ULPI timing Parameter Symbol Value(1) 1. VDD = 2.7 V to 3.6 V and TA = –40 to 85 °C. Unit Min. Max. Output clock Setup time (control in) tSC, tSD -6.0 ns Hold time (control in) tHC, tHD 0.0 - ns Output delay (control out) tDC, tDD -9.0 ns Input clock (optional) Setup time (control in) tSC, tSD -3.0 ns Hold time (control in) tHC, tHD 1.5 - ns Output delay (control out) tDC, tDD -6.0 ns Table 60. Ethernet DC electrical characteristics Symbol Parameter Min.(1) 1. All the voltages are measured from the local ground potential. Max.(1) Unit Input level VDD Ethernet operating voltage 2.7 3.6 V Table 61. Dynamics characteristics: Ethernet MAC signals for SMI(1) 1. TBD stands for “to be defined”. Symbol Rating Min Typ Max Unit tMDC MDC cycle time (1.71 MHz, AHB = 72 MHz) TBD TBD TBD ns td(MDIO) MDIO write data valid time TBD TBD TBD ns tsu(MDIO) Read data setup time TBD TBD TBD ns th(MDIO) Read data hold time TBD TBD TBD ns ETH_MDC ETH_MDIO(O) ETH_MDIO(I) tMDC td(MDIO) tsu(MDIO) th(MDIO) ai15666c |
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