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STM32F407IG Datasheet(PDF) 109 Page - STMicroelectronics

Part # STM32F407IG
Description  USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera
PDF  154 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F407IG Datasheet(HTML) 109 Page - STMicroelectronics

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STM32F405xx, STM32F407xx
Electrical characteristics
Doc ID 022152 Rev 1
109/154
Equation 1: RAIN max formula
The formula above (Equation 1) is used to determine the maximum external impedance
allowed for an error below 1/4 of LSB. N = 12 (from 12-bit resolution) and k is the number of
sampling periods defined in the ADC_SMPR1 register.
a
Note:
ADC accuracy vs. negative injection current: Injecting a negative current on any of the
standard (non-robust) analog input pins should be avoided as this significantly reduces the
accuracy of the conversion being performed on another analog input. It is recommended to
add a Schottky diode (pin to ground) to standard analog pins which may potentially inject
negative currents.
Any positive injection current within the limits specified for IINJ(PIN) and ΣIINJ(PIN) in
Section 5.3.16 does not affect the ADC accuracy.
Table 65.
ADC accuracy (1)(2)
1.
Better performance could be achieved in restricted VDD, frequency and temperature ranges.
2.
TBD stands for “to be defined”.
Symbol
Parameter
Test conditions
Typ
Max(3)
3.
Based on characterization, not tested in production.
Unit
ET
Total unadjusted error
fPCLK2 = 84 MHz,
fADC = 36 MHz, RAIN < 10 kΩ,
VDDA = 1.8
(4) to 3.6 V
4.
If PDR_ON is set to VSS, this value can be lowered to 1.7 V when the device operates in a reduced
temperature range (0 to 70 °C).
TBD
TBD
LSB
EO
Offset error
TBD
TBD
EG
Gain error
TBD
TBD
ED
Differential linearity error
TBD
TBD
EL
Integral linearity error
TBD
TBD
R
AIN
k0.5
–
()
f
ADC
C
ADC
2
N
2
+
()
ln
×
×
--------------------------------------------------------------
R
ADC
–
=



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