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F75113 Datasheet(PDF) 16 Page - Feature Integration Technology Inc. |
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F75113 Datasheet(HTML) 16 Page - Feature Integration Technology Inc. |
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16 / 87 page  Dec,2011 V0.13P - 14 - F75113 count down to zero 1ms count down to zero 20ms WatchDog Timer 2 0~255(sec or minute) Pulse Width 1ms Pulse Width 20ms count down to zero 100ms Pulse Width 100ms count down to zero 5s Pulse Width 5s 0~255(sec or minute) 0~255(sec or minute) 0~255(sec or minute) RSTOUT2 RSTOUT2 RSTOUT2 RSTOUT2 Power-Down Control Function F75113 provides smart power down and manual power down. In the smart power down mode, if all functions idle more then 10ms (Default 63h), the chip would auto power down. Also, it would wakeup when GPIO state change or read/write the registers. There is a figure describe how F75113 Auto-Power-Down the system. In manual power down, if users set bit 0 to one at index 01h of Configuration Registers, the F75113 will be power down instantly. There is a figure describe how F75113 Power-Down the system in manual power down mode. |
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