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SPC564B74L7 Datasheet(PDF) 52 Page - STMicroelectronics |
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SPC564B74L7 Datasheet(HTML) 52 Page - STMicroelectronics |
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52 / 118 page ![]() Electrical Characteristics SPC564Bxx - SPC56ECxx 52/118 Doc ID 17478 Rev 4 5. Full electrical specification cannot be guaranteed when voltage drops below 3.0 V. In particular, ADC electrical characteristics and I/Os DC electrical specification may not be guaranteed. When voltage drops below VLVDHVL, device is reset. 6. Both the relative and the fixed conditions must be met. For instance: If VDD_HV_A is 5.9 V, VDD_HV_ADC0 maximum value is 6.0 V then, despite the relative condition, the max value is VDD_HV_A + 0.3 = 6.2 V. 7. PA3, PA7, PA10, PA11 and PE12 ADC_1 channels are coming from VDD_HV_B domain hence VDD_HV_ADC1 should be within ±100 mV of VDD_HV_B when these channels are used for ADC_1. 8. Guaranteed by the device validation. Table 11. Recommended operating conditions (5.0 V) Symbol Parameter Conditions Value Unit Min Max VSS_HV SR Digital ground on VSS_HV pins — 0 0 V VDD_HV_A (1) SR Voltage on VDD_HV_A pins with respect to ground (VSS_HV) —4.5 5.5 V Voltage drop(2) 3.0 5.5 VDD_HV_B SR Generic GPIO functionality — 3.0 5.5 V Ethernet/3.3 V functionality (See the notes in all figures in Section 3: Package pinouts and signal descriptions” for the list of channels operating in VDD_HV_B domain) —3.0 3.6 V VSS_LV (3) SR Voltage on VSS_LV (Low voltage digital supply) pins with respect to ground (VSS_HV) —VSS_HV –0.1 VSS_HV +0.1 V VRC_CTRL (4) Base control voltage for external BCP68 NPN device Relative to VDD_LV 0VDD_LV +1 V VSS_ADC SR Voltage on VSS_HV_ADC0, VSS_HV_ADC1 (ADC reference) pin with respect to ground (VSS_HV) —VSS_HV –0.1 VSS_HV +0.1 V VDD_HV_ADC0 (5) SR Voltage on VDD_HV_ADC0 with respect to ground (VSS_HV) —4.5 5.5 V Voltage drop(2) 3.0 5.5 Relative to VDD_HV_A (6) VDD_HV_A –0.1 VDD_HV_A +0.1 VDD_HV_ADC1 (7) SR Voltage on VDD_HV_ADC1 with respect to ground (VSS_HV) —4.5 5.5 V Voltage drop(2) 3.0 5.5 Relative to VDD_HV_A (6) VDD_HV_A − 0.1 VDD_HV_A +0.1 VIN SR Voltage on any GPIO pin with respect to ground (VSS_HV) —VSS_HV –0.1 — V Relative to VDD_HV_A/HV_B — VDD_HV_A/HV_B +0.1 |
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