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SPC564B74L7 Datasheet(PDF) 64 Page - STMicroelectronics

Part # SPC564B74L7
Description  32-bit MCU family built on the Power Architecture® for automotive body electronics applications
PDF  118 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPC564B74L7 Datasheet(HTML) 64 Page - STMicroelectronics

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Electrical Characteristics
SPC564Bxx - SPC56ECxx
64/118
Doc ID 17478 Rev 4
4.8
Power management electrical characteristics
4.8.1
Voltage regulator electrical characteristics
The device implements an internal voltage regulator to generate the low voltage core supply
VDD_LV from the high voltage supply VDD_HV_A. The following supplies are involved:
●
HV: High voltage external power supply for voltage regulator module. This must be
provided externally through VDD_HV_A power pin.
●
LV: Low voltage internal power supply for core, FMPLL and Flash digital logic. This is
generated by the on-chip VREG with an external ballast (BCP68 NPN device). It is
further split into four main domains to ensure noise isolation between critical LV
modules within the device:
–
LV_COR: Low voltage supply for the core. It is also used to provide supply for
FMPLL through double bonding.
–
LV_CFLA0/CFLA1: Low voltage supply for the two code Flash modules. It is
shorted with LV_COR through double bonding.
–
LV_DFLA: Low voltage supply for data Flash module. It is shorted with LV_COR
through double bonding.
–
LV_PLL: Low voltage supply for FMPLL. It is shorted to LV_COR through double
bonding.
Figure 8.
Voltage regulator capacitance connection
32 KB
56 KB
Split
Split
CTRL
CTRL
Split
CTRL
PD0 (always on domain)
PD1 Switchable Domain
HPREG
LPREG
HPVDD
LPVDD
VDD_LV
VSS_LV
Off chip
BCP68
40
μf
HPVDD
LPVDD
sw1 (<0.1
Ω)
8KB
VDD_BV
VDD_HV_A
VSS_HV
100 nf
(FMPLL, Flash)
VDD_LV
VDD_LV
VDD_LV
VSS_LV
VSS_LV
VSS_LV
100 nf
100 nf
100 nf
VRC_CTRL
(CREGn)
Chip Boundary
10
μf
(CDEC2)
(4
× 10 μf)
NPN driver



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