AD7731 datasheet(33/44 Pages) AD

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AD7731

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REV. 0

Placing the part in standby mode reduces the total current to

µA typical when the part is operated from an external master

clock, provided this master clock is stopped. If the external

clock continues to run in standby mode, the standby current

increases to 400

µA typical. If a crystal or ceramic resonator is

used as the clock source, then the total current in standby mode

is 400

µA typical. This is because the on-chip oscillator circuit

continues to run when the part is in its standby mode. This is

important in applications where the system clock is provided by

the AD7731’s clock, so that the AD7731 produces an uninter-

rupted master clock even when it is in its standby mode.

Digital Outputs

The AD7731 has two digital output pins, D0 and D1. When

the DEN bit of the Mode Register is set to 1, these digital

outputs assume the logic status of bits D0 and D1 of the

Mode Register. It gives the user access to two digital port

pins which can be programmed over the normal serial inter-

face of the AD7731. The two outputs obtain their supply

voltage from AVDD, thus the outputs operate to 5 V levels

even in cases where DVDD = +3 V.

POWER SUPPLIES

There is no specific power sequence required for the AD7731,

either the AVDD or the DVDD supply can come up first. While

the latch-up performance of the AD7731 is very good, it is

important that power is applied to the AD7731 before signals at

REF IN, AIN or the logic input pins in order to avoid latch-up

caused by excessive current. If this is not possible, then the

current which flows in any of these pins should be limited to less

than 30 mA per pin and less than 100 mA cumulative. If sepa-

rate supplies are used for the AD7731 and the system digital

circuitry, then the AD7731 should be powered up first. If it is

not possible to guarantee this, then current limiting resistors

should be placed in series with the logic inputs to again limit the

current to less than 30 mA per pin and less than 100 mA total.

Grounding and Layout

Since the analog inputs and reference input are differential,

most of the voltages in the analog modulator are common-mode

voltages. The excellent Common-Mode Rejection of the part

will remove common-mode noise on these inputs. The analog

and digital supplies to the AD7731 are independent and sepa-

rately pinned out to minimize coupling between the analog and

digital sections of the device. The digital filter will provide rejec-

tion of broadband noise on the power supplies, except at integer

multiples of the modulator sampling frequency. The digital filter

also removes noise from the analog and reference inputs pro-

vided those noise sources do not saturate the analog modulator.

As a result, the AD7731 is more immune to noise interference

that a conventional high resolution converter. However, because

the resolution of the AD7731 is so high and the noise levels

from the AD7731 so low, care must be taken with regard to

grounding and layout.

The printed circuit board that houses the AD7731 should be

designed such that the analog and digital sections are separated

and confined to certain areas of the board. This facilitates the

use of ground planes which can be separated easily. A minimum

etch technique is generally best for ground planes as it gives the

best shielding. Digital and analog ground planes should only be

joined in one place. If the AD7731 is the only device requiring

an AGND to DGND connection, the ground planes should be

connected at the AGND and DGND pins of the AD7731. If the

AD7731 is in a system where multiple devices require AGND to

DGND connections, the connection should still be made at one

point only, a star ground point, which should be established as

close as possible to the AD7731.

Avoid running digital lines under the device as these will couple

noise onto the die. The analog ground plane should be allowed

to run under the AD7731 to avoid noise coupling. The power

supply lines to the AD7731 should use as large a trace as pos-

sible to provide low impedance paths and reduce the effects of

glitches on the power supply line. Fast switching signals like

clocks should be shielded with digital ground to avoid radiating

noise to other sections of the board and clock signals should

never be run near the analog inputs. Avoid crossover of digital

and analog signals. Traces on opposite sides of the board should

run at right angles to each other. This will reduce the effects of

feedthrough through the board. A microstrip technique is by far

the best but is not always possible with a double-sided board. In

this technique, the component side of the board is dedicated to

ground planes while signals are placed on the solder side.

Good decoupling is important when using high resolution ADCs.

All analog supplies should be decoupled with 10

µF tantalum in

parallel with 0.1

µF capacitors to AGND. To achieve the best

from these decoupling components, they have to be placed as

close as possible to the device, ideally right up against the device.

All logic chips should be decoupled with 0.1

µF disc ceramic

capacitors to DGND. In systems where a common supply volt-

age is used to drive both the AVDD and DVDD of the AD7731, it

is recommended that the system’s AVDD supply is used. This

supply should have the recommended analog supply decoupling

capacitors between the AVDD pin of the AD7731 and AGND

and the recommended digital supply decoupling capacitor

between the DVDD pin of the AD7731 and DGND.

Evaluating the AD7731 Performance

A recommended layout for the AD7731 is outlined in the evalu-

ation board for the AD7731. The evaluation board package

includes a fully assembled and tested evaluation board, docu-

mentation, software for controlling the board over the printer

port of a PC and software for analyzing the AD7731’s perfor-

mance on the PC. The evaluation board order number is

EVAL-AD7731EB.

Noise levels in the signals applied to the AD7731 may also

affect performance of the part. The AD7731 allows a technique

for evaluating the true performance of the part, independent of

the analog input signal. This scheme should be used after a

calibration has been performed on the part.

The first method is to select the AIN6/AIN6 input channel

arrangement. In this case, the differential inputs to the AD7731

are internally shorted together to provide a zero differential

voltage for the analog modulator. External to the device, the

AIN6 input should be connected to a voltage which is within the

allowable common-mode range of the part.

The software in the evaluation board package allows the user to

look at the noise performance in terms of bits and nV. Once the

user has established that the noise performance of the part is

satisfactory in this mode, then an external input voltage can be

applied to the device incorporating more of the signal chain.

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