AD9777EB datasheet(3/48 Pages) AD

3 / 48 page

REV. 0

AD9777

–3–

DC SPECIFICATIONS

Parameter

Min

Typ

Max

Unit

RESOLUTION

Bits

DC Accuracy

Integral Nonlinearity

±6

LSB

Differential Nonlinearity

–6.5

±3

+6.5

LSB

ANALOG OUTPUT (for 1R and 2R Gain Setting Modes)

Offset Error

–0.025

±0.01

+0.025

% of FSR

Gain Error (with Internal Reference)

–1.0

+1.0

% of FSR

Gain Matching

–1

±0.1

% of FSR

Full-Scale Output Current

220

Output Compliance Range

–1.0

+1.25

Output Resistance

200

Ω

Output Resistance

Gain, Offset Cal DACs, Monotonicity Guaranteed

REFERENCE OUTPUT

Reference Voltage

1.14

1.20

1.26

Reference Output Current

100

REFERENCE INPUT

Input Compliance Range

0.1

1.25

Reference Input Resistance (REFLO = 3 V)

Ω

Small Signal Bandwidth

0.5

MHz

TEMPERATURE COEFFICIENTS

Offset Drift

ppm of FSR/

°C

Gain Drift (With Internal Reference)

ppm of FSR/

°C

Reference Voltage Drift

ppm/

°C

POWER SUPPLY

AVDD

Voltage Range

3.1

3.3

3.5

Analog Supply Current (IAVDD)

72.5

IAVDD in SLEEP Mode

23.3

CLKVDD (PLL OFF)

Voltage Range

3.1

3.3

3.5

Clock Supply Current (ICLKVDD)

8.5

CLKVDD (PLL ON)

Clock Supply Current (ICLKVDD)23.5

DVDD

Voltage Range

3.1

3.3

3.5

Digital Supply Current (IDVDD)

Nominal Power Dissipation

380

410

PDIS

1.75

PDIS in PWDN

6.0

Power Supply Rejection Ratio—AVDD

±0.4

% of FSR/V

OPERATING RANGE

–40

+85

°C

NOTES

1Measured at I

OUTA driving a virtual ground.

2Nominal full-scale current, I

OUTFS, is 32

× the I

REF current.

3Use an external amplifier to drive any external load.

4100 MSPS f

DAC with fOUT = 1 MHz, all supplies = 3.3 V, no interpolation, no modulation.

5400 MSPS f

DAC, fDATA = 50 MSPS, fS/2 modulation, PLL enabled.

Specifications subject to change without notice.

(TMIN to TMAX, AVDD = 3.3 V, CLKVDD = 3.3 V, DVDD = 3.3 V, PLLVDD = 3.3 V, IOUTFS = 20 mA, unless

otherwise noted.)

AD9777–SPECIFICATIONS

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