AD9833 datasheet(14/18 Pages) AD

14 / 18 page

AD9833

–14–

REV PrG

PRELIMINARY TECHNICAL DATA

Figure 7. Initialisation

Figure 6. Flow Chart for AD9833 Initialisation and Operation

WAIT 7/8 MCLK

CYCLES

VOUT = VREF * 18 * RLOAD/RSET * (1+ (SIN(2p(FREQREG * FMCLK * t/2

28 + PHASEREG/212)))

DAC OUTPUT

DATA WRITE

SELECT DATA

SOURCES

INITIALISATION

See Figure 7 below

CHANGE PHASE?

CHANGE FREQUENCY?

CHANGE

FSELECT?

CHANGE FREQ

CHANGE DAC OUTPUT

FROM SIN TO RAMP?

CONTROL

WRITE

(see Table 11)

CHANGE OUTPUT TO

A DIGITAL SIGNAL?

CHANGE

PSELECT?

CHANGE PHASE

See Figure 8 below

YES

INITIALISATION

APPLY RESET

WRITE TO FREQUENCY AND PHASE REGISTERS

FREQ0 REG = FOUT0 / fMCLK * 2

FREQ1 REG = FOUT1 / fMCLK * 2

PHASE 0 & PHASE1 REG = (PhaseShift * 212) / 2p

(See Figure 8)

SET RESET = 0

SELECT FREQUENCY REGISTERS

SELECT PHASE REGISTERS

(CONTROL REGISTER WRITE)

RESET bit = 0

FSELECT = Selected Freq Register

PSELECT = Selected Phase Register

(CONTROL REGISTER WRITE)

RESET = 1

AD9833 Datasheet(PDF) 14 Page - Analog Devices

AD9833 Datasheet(HTML) 14 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

Datasheet Download

Link URL