ADV7175 datasheet(8/36 Pages) AD

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ADV7175/ADV7176

REV. A

–8–

COLOR BAR GENERATION

The ADV7175/ADV7176 can be configured to generate 75%

amplitude, 75% saturation (75/7.5/75/7.5) for NTSC or 75%

amplitude, 100% saturation (100/0/75/0) for PAL color bars.

These are enabled by setting MR17 of Mode Register 1 to

Logic “1.”

SQUARE PIXEL MODE

The ADV7175/ADV7176 can be used to operate in square

pixel mode. For NTSC operation an input clock of 24.54 MHz

is required. Alternatively, for PAL operation, an input clock of

29.5 MHz is required. The internal filters scale accordingly for

square pixel mode operation.

COLOR SIGNAL CONTROL

The color information can be switched on and off the video

output using Bit MR24 of Mode Register 2.

BURST SIGNAL CONTROL

The burst information can be switched on and off the video

output using Bit MR25 of Mode Register 2.

NTSC PEDESTAL CONTROL

The pedestal information on both odd and even fields can be

controlled on a line by line basis using the NTSC Pedestal

Control Registers. This allows the pedestals to be controlled

during the vertical blanking interval (Lines 10 to 25).

SUBCARRIER RESET

Together with the SCRESET/RTC PIN and Bits MR22 and

MR21 of Mode Register 2, the ADV7175/ADV7176 can be

used in subcarrier reset mode. The subcarrier will reset to field

0 at the start of the following field when a high to low transition

occurs on this input pin.

REAL TIME CONTROL

Together with the SCRESET/RTC PIN and Bits MR22 and

MR21 of Mode Register 2, the ADV7175/ADV7176 can be

used to lock an external video source. The real time control

mode allows the ADV7175/ADV7176 to automatically alter the

subcarrier frequency to compensate for line length variation.

When the part is connected to a device that outputs out a digi-

tal datastream in the RTC format (such as a Phillips SAA7110

video decoder), the part will automatically change to the com-

pensated subcarrier frequency on a line by line basis. This

digital datastream is 67 bits wide and the subcarrier is con-

tained in bits 0 to 21. Each bit is 2 clock cycles long.

COMPOSITE

VIDEO

e.g. VCR

OR CABLE

HSYNC

FIELD/

VSYNC

CLOCK

GREEN/LUMA/Y

RED/CHROMA/V

BLUE/COMPOSITE/U

COMPOSITE

ADV7175/ADV7176

P7–P0

SCRESET/RTC

MPEG

DECODER

VIDEO

DECODER

(e.g.SAA7110)

Figure 12. RTC Connections

PIXEL TIMING DESCRIPTION

The ADV7175/ADV7176 can operate in either 8-bit or 16-bit

YCrCb Mode.

8-Bit YCrCb Mode

This default mode accepts multiplexed YCrCb inputs through

the P7–P0 pixel inputs. The inputs follow the sequence Cb0,

Y0 Cr0, Y1 Cb1, Y2, etc. The Y, Cb and Cr data are input on

a rising clock edge.

16-Bit YCrCb Mode

This mode accepts Y inputs through the P7-P0 pixel inputs and

multiplexed CrCb inputs through the P15-P8 pixel inputs. The

data is loaded on every second rising clock edge of CLOCK.

The inputs follow the sequence Cb0, Y0 Cr0, Y1 Cb1, Y2, etc.

VIDEO TIMING DESCRIPTION

The ADV7175/ADV7176 is intended to interface to off the shelf

MPEG1 and MPEG2 Decoders. As a consequence the

ADV7175/ADV7176 accepts 4:2:2 YCrCb pixel data via a

CCIR-656 pixel port and has several video timing modes of

operation that allow it to be configured as either system master

video timing generator or a slave to the system video timing gen-

erator. The ADV7175/ADV7176 generates all of the required

horizontal and vertical timing periods and levels for the analog

video outputs.

The ADV7175/ADV7176 calculates the width and placement

of analog sync pulses, blanking levels and color burst envelopes.

Color bursts are disabled on appropriate lines and serration and

equalization pulses are inserted where required.

FREQUENCY – MHz

02468

–10

–40

–20

–80

–60

–100

–50

–30

–90

–70

Figure 10. NTSC UV Filter

FREQUENCY – MHz

02468

–10

–40

–20

–80

–60

–100

–50

–30

–90

–70

Figure 11. PAL UV Filter

(Continued on page 15)

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