Level

Shift

+V

S

Input

Pin

x2

THS7320

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SBOS565B – JULY 2011 – REVISED SEPTEMBER 2012

The input impedance of the THS7320 is dictated by the internal high-impedance gain of 2 V/V initial amplifier, as

shown in Figure 57. This buffer has a very high 2.4-M

Ω || 2-pF input impedance that is effectively transparent to

the source with no interactions. Unlike other products where the filter elements are tied directly to the input pin

without buffering, there are no filter performance changes or interaction with the DAC termination resistance.

Note that the internal voltage shift does not appear at the input pin; it only shows at the output pin.

Figure 57. Equivalent Video Section DC Input Mode Circuit

While ac-coupling with dc-biasing using external resistor dividers can be done, it is generally not recommended

because of the large resistor values required. These large resistor values coupled with the input bias current of

the THS7320 input can cause a significant voltage shift to appear on the input. If ac-coupling is necessary for a

system, several elements must be taken into account for a proper design: the high-pass corner frequency

(typically desired to be approximately 2.5 Hz); the size of the input capacitor value; the parallel input resistance

of the voltage divider; and the input bias current. Contact Texas Instruments for design support if ac-coupling is

necessary in the design.

DC-COUPLED OUTPUT

The THS7320 video section incorporates a rail-to-rail output stage that can drive the line directly without the need

for large ac-coupling capacitors. This design offers the best line tilt and field tilt (droop) performance because no

ac-coupling occurs. Keep in mind that if the input is ac-coupled, then the resulting tilt as a result of the input ac-

coupling continues to be seen on the output, regardless of the output coupling. The 70-mA output current drive

capability of the THS7320 is designed to drive the video line while keeping the output dynamic range as wide as

possible.

One concern of dc-coupling, however, arises if the line is terminated to ground. If an ac-bias input configuration

signals, the output of the THS7320 then has a dc bias on the output, such as 1 V. This configuration allows a dc

current path to flow, such as 1 V/150

Ω = 6.67 mA. The result of this configuration is a slightly decreased high

output voltage swing and an increase in power dissipation of the THS7320. While the THS7320 was designed to

operate with a junction temperature of up to +125°C, care must be taken to ensure that the junction temperature

does not exceed this level or else long-term reliability could suffer. Using a 5-V supply, this configuration can

result in an additional power dissipation of (5 V – 1 V) × 6.67 mA = 26.7 mW per channel. With a 3.3-V supply,

this dissipation reduces to 15.3 mW per channel. The overall low quiescent current of the THS7320 design

minimizes potential thermal issues even when used at high ambient temperatures, but power and thermal

analysis should always be examined in any system to ensure that no issues arise. Be sure to use RMS power

and not instantaneous power when evaluating the thermal performance.

Note that the THS7320 can drive the line with dc-coupling regardless of the input mode of operation. The only

requirement is to make sure the video line has proper termination in series with the output (typically 75

Ω). This

requirement helps isolate capacitive loading effects from the THS7320 output. Failure to properly isolate

capacitive loads may result in ringing or oscillation. The stray capacitance appearing directly at the THS7320

output pins should be kept below 18 pF. One method to ensure this condition is valid is to verify that the 75-

Ω

source resistor is placed next to each THS7320 output pin.

Copyright © 2011–2012, Texas Instruments Incorporated

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Product Folder Links: THS7320