 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
AD9102-EBZ Datasheet(PDF) 1 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD9102-EBZ Datasheet(HTML) 1 Page - Analog Devices |
|
|
1 / 36 page  Low Power, 14-Bit, 180 MSPS, Digital-to-Analog Converter and Waveform Generator Data Sheet AD9102 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2013 Analog Devices, Inc. All rights reserved. FEATURES On-chip 4096 × 14-bit pattern memory On-chip DDS Power dissipation @ 3.3 V, 4 mA output 96.54 mW @ 180 MSPS Sleep mode: <5 mW @ 3.3 V Supply voltage: 1.8 V to 3.3 V SFDR to Nyquist 87 dBc @ 10 MHz output Phase noise @ 1 kHz offset, 180 MSPS, 8 mA: −150 dBc/Hz Differential current outputs: 8 mA max @ 3.3 V Small footprint, 32-lead, 5 mm × 5 mm LFCSP with 3.6 mm × 3.6 mm exposed paddle, and Pb-free package APPLICATIONS Medical instrumentation Portable instrumentation Signal generators, arbitrary waveform generators Automotive radar GENERAL DESCRIPTION The AD9102 TxDAC® and waveform generator is a high perfor- mance digital-to-analog converter (DAC) integrating on-chip pattern memory for complex waveform generation with a direct digital synthesizer (DDS). The DDS is a 14-bit output, up to 180 MSPS master clock sine wave generator with a 24-bit tuning word, allowing 10.8 Hz/LSB frequency resolution. SRAM data can include directly generated stored waveforms, amplitude modulation patterns applied to DDS outputs, or DDS frequency tuning words. An internal pattern control state machine lets the user program the pattern period for the DAC as well the start delay within the pattern period for the signal output on the DAC . A SPI interface is used to configure the digital waveform generator and load patterns into the SRAM. A gain adjustment factor and an offset adjustment are applied to the digital signal on their way into the DAC. The AD9102 offers exceptional ac and dc performance and supports DAC sampling rates of up to 180 MSPS. The flexible power supply operating range of 1.8 V to 3.3 V and low power dissipation of the AD9102 make it well suited for portable and low power applications. PRODUCT HIGHLIGHTS 1. High Integration. On-chip DDS and 4096 × 14 pattern memory. 2. Low Power. Power-down mode provides for low power idle periods. FUNCTIONAL BLOCK DIAGRAM DAC 10kΩ IREF 100µA 1.8V LDOs 1V AD9102 IOUTP IOUTN AVDD1 AGND AVDD2 1.8V LDO SRAM ADDRESS GAIN OFFSET DAC TIMERS + STATE MACHINE START ADDR START DELAY STOP ADDR TRIGGER DDS TUNING WORD PHASE DAC CLOCK DDS SPI INTERFACE BAND GAP RSET1 16kΩ CLOCK DIST Figure 1. |
Similar Part No. - AD9102-EBZ |
|
Similar Description - AD9102-EBZ |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
