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HT66F20 Datasheet(PDF) 147 Page - Holtek Semiconductor Inc |
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HT66F20 Datasheet(HTML) 147 Page - Holtek Semiconductor Inc |
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147 / 298 page  Rev. 1.90 146 �e���a�� 18� �01� Rev. 1.90 147 �e���a�� 18� �01� HT66F20/HT66F30/HT66F40/HT66F50/HT66F60 HT66FU30/HT66FU40/HT66FU50/HT66FU60 Enhanced A/D Flash Type 8-Bit MCU with EEPROM HT66F20/HT66F30/HT66F40/HT66F50/HT66F60 HT66FU30/HT66FU40/HT66FU50/HT66FU60 Enhanced A/D Flash Type 8-Bit MCU with EEPROM 10-bit Enhanced TM Register List – HT66F30/HT66F40/HT66F50/HT66F60 • TM1C0 Register – 10-bit ETM Bit 7 6 5 4 3 2 1 0 Name T1PAU T1CK� T1CK1 T1CK0 T1ON T1RP� T1RP1 T1RP0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 0 0 0 0 0 0 0 0 Bit7 T1PAU:TM1CounterPauseControl 0:Run 1:Pause Thecountercanbepausedbysettingthisbithigh.Clearingthebittozerorestores normalcounteroperation.WheninaPauseconditiontheTMwillremainpoweredup andcontinuetoconsumepower.Thecounterwillretainitsresidualvaluewhenthisbit changesfromlowtohighandresumecountingfromthisvaluewhenthebitchanges toalowvalueagain. Bit6~4 T1CK2~T1CK0:SelectTM1Counterclock 000:fSYS/4 001:fSYS 010:fH/16 011:fH/64 100:fTBC 101:Undefined 110:TCK1risingedgeclock 111:TCK1fallingedgeclock ThesethreebitsareusedtoselecttheclocksourcefortheTM.SelectingtheReserved clockinputwilleffectivelydisabletheinternalcounter.Theexternalpinclocksource canbechosentobeactiveontherisingorfallingedge.TheclocksourcefSYSisthe systemclock,whilefHandfTBCareotherinternalclocks,thedetailsofwhichcanbe foundintheoscillatorsection. Bit3 T1ON:TM1CounterOn/OffControl 0:Off 1:On Thisbitcontrolstheoverallon/offfunctionoftheTM.Settingthebithighenablesthe countertorun,clearingthebitdisablestheTM.Clearingthisbittozerowillstopthe counterfromcountingandturnofftheTMwhichwillreduceitspowerconsumption. Whenthebitchangesstatefromlowtohightheinternalcountervaluewillberesetto zero,howeverwhenthebitchangesfromhightolow,theinternalcounterwillretain itsresidualvalueuntilthebitreturnshighagain. IftheTMisintheCompareMatchOutputModethentheTMoutputpinwillbereset toitsinitialcondition,asspecifiedbytheT1OCbit,whentheT1ONbitchangesfrom lowtohigh. Bit2~0 T1RP2~T1RP0:TM1CCRP3-bitregister,comparedwiththeTM1Counterbit9~bit7 ComparatorPMatchPeriod 000:1024TM1clocks 001:128TM1clocks 010:256TM1clocks 011:384TM1clocks 100:512TM1clocks 101:640TM1clocks 110:768TM1clocks 111:896TM1clocks ThesethreebitsareusedtosetupthevalueontheinternalCCRP3-bitregister,which arethencomparedwiththeinternalcounter'shighestthreebits.Theresultofthis comparisoncanbeselectedtocleartheinternalcounteriftheT1CCLRbitissetto zero.SettingtheT1CCLRbittozeroensuresthatacomparematchwiththeCCRP valueswillresettheinternalcounter.AstheCCRPbitsareonlycomparedwiththe highestthreecounterbits,thecomparevaluesexistin128clockcyclemultiples. Clearingallthreebitstozeroisineffectallowingthecountertooverflowatits maximumvalue. |
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