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HT66F20 Datasheet(PDF) 176 Page - Holtek Semiconductor Inc

Part # HT66F20
Description  Enhanced A/D Flash Type 8-Bit MCU with EEPROM
PDF  298 Pages
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Manufacturer  HOLTEK [Holtek Semiconductor Inc]
Direct Link  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT66F20 Datasheet(HTML) 176 Page - Holtek Semiconductor Inc

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Rev. 1.90
176
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Rev. 1.90
177
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HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
Enhanced A/D Flash Type 8-Bit MCU with EEPROM
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
Enhanced A/D Flash Type 8-Bit MCU with EEPROM
A/D Operation
TheSTARTbitintheADCR0registerisusedtostartandresettheA/Dconverter.Whenthe
microcontrollersetsthisbitfromlowtohighandthenlowagain,ananalogtodigitalconversion
cyclewillbeinitiated.WhentheSTARTbitisbroughtfromlowtohighbutnotlowagain,theEOCB
bitintheADCR0registerwillbesethighandtheanalogtodigitalconverterwillbereset.Itisthe
STARTbitthatisusedtocontroltheoverallstartoperationoftheinternalanalogtodigitalconverter.
TheEOCBbitintheADCR0registerisusedtoindicatewhentheanalogtodigitalconversion
processiscomplete.Thisbitwillbeautomaticallysetto0bythemicrocontrollerafteraconversion
cyclehasended.Inaddition,thecorrespondingA/Dinterruptrequestflagwillbesetintheinterrupt
controlregister,andiftheinterruptsareenabled,anappropriateinternalinterruptsignalwillbe
generated.ThisA/DinternalinterruptsignalwilldirecttheprogramflowtotheassociatedA/D
internalinterruptaddressforprocessing.IftheA/Dinternalinterruptisdisabled,themicrocontroller
canbeusedtopolltheEOCBbitintheADCR0registertocheckwhetherithasbeenclearedasan
alternativemethodofdetectingtheendofanA/Dconversioncycle.
TheclocksourcefortheA/Dconverter,whichoriginatesfromthesystemclockfSYS,canbechosen
tobeeitherfSYSorasubdividedversionoffSYS.Thedivisionratiovalueisdeterminedbythe
ADCK2~ADCK0bitsintheADCR1register.
AlthoughtheA/DclocksourceisdeterminedbythesystemclockfSYS,andbybitsADCK2~ADCK0,
therearesomelimitationsonthemaximumA/Dclocksourcespeedthatcanbeselected.Asthe
minimumvalueofpermissibleA/Dclockperiod,tADCK,is0.5μs,caremustbetakenforsystemclock
frequenciesequaltoorgreaterthan4MHz.Forexample,ifthesystemclockoperatesatafrequency
of4MHz,theADCK2~ADCK0bitsshouldnotbesetto000.DoingsowillgiveA/Dclockperiods
thatarelessthantheminimumA/DclockperiodwhichmayresultininaccurateA/Dconversion
values.Refertothefollowingtableforexamples,wherevaluesmarkedwithanasterisk*show
where,dependinguponthedevice,specialcaremustbetaken,asthevaluesmaybelessthanthe
specifiedminimumA/DClockPeriod.
fSYS
A/D Clock Period (tADCK)
ADCK2,
ADCK1,
ADCK0
=000
(fSYS)
ADCK2,
ADCK1,
ADCK0
=001
(fSYS/2)
ADCK2,
ADCK1,
ADCK0
=010
(fSYS/4)
ADCK2,
ADCK1,
ADCK0
=011
(fSYS/8)
ADCK2,
ADCK1,
ADCK0
=100
(fSYS/16)
ADCK2,
ADCK1,
ADCK0
=101
(fSYS/32)
ADCK2,
ADCK1,
ADCK0
=110
(fSYS/64)
ADCK2,
ADCK1,
ADCK0
=111
1MHz
1μs
2μs
4μs
8μs
16μs
32μs
64μs
Undefined
�MHz
500ns
1μs
2μs
4μs
8μs
16μs
32μs
Undefined
4MHz
�50ns*
500ns
1μs
2μs
4μs
8μs
16μs
Undefined
8MHz
1�5ns*
�50ns*
500ns
1μs
2μs
4μs
8μs
Undefined
1�MHz
8�ns*
167ns*
���ns*
667ns
1.33μs
2.67μs
5.33μs
Undefined
A/D Clock Period Examples
Controllingthepoweron/offfunctionoftheA/Dconvertercircuitryisimplementedusingthe
ADOFFbitintheADCR0register.ThisbitmustbezerotopowerontheA/Dconverter.When
theADOFFbitisclearedtozerotopowerontheA/Dconverterinternalcircuitryacertaindelay,
asindicatedinthetimingdiagram,mustbeallowedbeforeanA/Dconversionisinitiated.Even
ifnopinsareselectedforuseasA/DinputsbyclearingtheACE11~ACE0bitsintheACERH
andACERLregisters,iftheADOFFbitiszerothensomepowerwillstillbeconsumed.Inpower
consciousapplicationsitisthereforerecommendedthattheADOFFissethightoreducepower
consumptionwhentheA/Dconverterfunctionisnotbeingused.
ThereferencevoltagesupplytotheA/DConvertercanbesuppliedfromeitherthepositivepower
supplypin,VDD,orfromanexternalreferencesourcessuppliedonpinVREF.Thedesiredselection
ismadeusingtheVREFSbit.AstheVREFpinispin-sharedwithotherfunctions,whentheVREFS
bitissethigh,theVREFpinfunctionwillbeselectedandtheotherpinfunctionswillbedisabled
automatically.



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