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HT66F20 Datasheet(PDF) 259 Page - Holtek Semiconductor Inc |
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HT66F20 Datasheet(HTML) 259 Page - Holtek Semiconductor Inc |
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259 / 298 page ![]() Rev. 1.90 �58 �e���a�� 18� �01� Rev. 1.90 �59 �e���a�� 18� �01� HT66F20/HT66F30/HT66F40/HT66F50/HT66F60 HT66FU30/HT66FU40/HT66FU50/HT66FU60 Enhanced A/D Flash Type 8-Bit MCU with EEPROM HT66F20/HT66F30/HT66F40/HT66F50/HT66F60 HT66FU30/HT66FU40/HT66FU50/HT66FU60 Enhanced A/D Flash Type 8-Bit MCU with EEPROM • Addressdetectmode SettingtheAddressDetectfunctionenablecontrolbit,ADDEN,intheUCR2register,enables thisspecialfunction.Ifthisbitissetto1,thenanadditionalqualifierwillbeplacedonthe generationofaReceiverDataAvailableinterrupt,whichisrequestedbytheRXIFflag.Ifthe ADDENbitisequalto1,thenwhenthedataisavailable,aninterruptwillonlybegenerated,if thehighestreceivedbithasahighvalue.Notethattherelatedinterruptenablecontrolbitandthe EMIbitofthemicrocontrollermustalsobeenabledforcorrectinterruptgeneration.Thehighest addressbitisthe9thbitifthebitBNO=1orthe8thbitifthebitBNO=0.Ifthehighestbitis high,thenthereceivedwordwillbedefinedasanaddressratherthandata.ADataAvailable interruptwillbegeneratedeverytimethelastbitofthereceivedwordisset.IftheADDENbit isequalto0,thenaReceiveDataAvailableinterruptwillbegeneratedeachtimetheRXIFflag isset,irrespectiveofthedatalastbutstatus.Theaddressdetectandparityfunctionsaremutually exclusivefunctions.Thereforeiftheaddressdetectfunctionisenabled,thentoensurecorrect operation,theparityfunctionshouldbedisabledbyresettingtheparityfunctionenablebitPREN tozero. ADDEN Bit 9 (BNO=1) Bit 8 (BNO=0) UART Interrupt Generated 0 0 √ 1 √ 1 0 × 1 √ ADDEN Bit Function UART Module Power-down and Wake-up TheMCUandUARTModulearepowereddownindependentlyofeachother.Themethodof poweringdowntheMCUiscoveredinthepreviousMCUsectionofthedatasheet.TheUART ModulemustbepowereddownbeforetheMCUispowereddown.Thisisimplementedbyfirst clearingtheUARTENbitintheUCR1registertodisabletheUARTModulecircuitryafterwhich theSCSinternallinecanbesethightodisabletheSPIinterfacecircuits.WhentheUARTand SPIinterfacesarepowereddown,theSCKandCLKIclocksourcestotheUARTmodulewillbe disabled.TheUARTModulecanbepoweredupbytheMCUbyfirstclearingtheSCSlinetozero andthensettingtheUARTENbit.IftheUARTcircuitsispowereddownwhileatransmissionisstill inprogress,thenthetransmissionwillbeterminatedandtheexternalTXtransmitpinwillbeforced toalogichighlevel.Inasimilarway,iftheUARTcircuitsispowereddownwhilereceivingdata, thenthereceptionofdatawilllikewisebeterminated.WhentheUARTcircuitsispowereddown, notethattheUSR,UCR1,UCR2,UCR3,transmitandreceiveregisters,aswellastheBRGregister willnotbeaffected. TheUARTModulecontainsareceiverRXpinwake-upfunction,whichisenabledordisabledby theWAKEbitintheUCR2register.Ifthisbit,alongwiththeUARTenablebitnamedUARTEN, thereceiverenablebitnamedRXENandthereceiverinterruptenablebitnamedRIE,areallset beforetheMCUandUARTmoduleareispowereddown,thenafallingedgeontheRXpinwill wakeuptheMCUfromitspowerdowncondition.Notethatasittakesacertainperiodoftime knownastheSystemStart-upTimeforoscillatortorestartandstabilizeafterawake-up,anydata receivedduringthistimeontheRXpinwillbeignored. ForaUARTwake-upinterrupttooccur,inadditiontothebitsforthewake-upenablecontrol andReceiveinterruptenablecontrolbeingset,theglobalinterruptenablecontrolandtherelated interruptenablecontrolbitsmustalsobeset.Ifthesetwobitsarenotset,thenonlyawake-upevent willoccurandnointerruptwillbeserviced.Notealsothatasittakesaperiodofdelayafterawake- upbeforenormalmicrocontrollerresumes,therelevantUARTinterruptwillnotbeserviceduntil thisperiodofdelaytimehaselapsed. |
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