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HT66F20 Datasheet(PDF) 258 Page - Holtek Semiconductor Inc |
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HT66F20 Datasheet(HTML) 258 Page - Holtek Semiconductor Inc |
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258 / 298 page ![]() Rev. 1.90 �58 �e���a�� 18� �01� Rev. 1.90 �59 �e���a�� 18� �01� HT66F20/HT66F30/HT66F40/HT66F50/HT66F60 HT66FU30/HT66FU40/HT66FU50/HT66FU60 Enhanced A/D Flash Type 8-Bit MCU with EEPROM HT66F20/HT66F30/HT66F40/HT66F50/HT66F60 HT66FU30/HT66FU40/HT66FU50/HT66FU60 Enhanced A/D Flash Type 8-Bit MCU with EEPROM UART Module Interrupt Structure SeveralindividualUARTconditionscangenerateaUARTinterrupt.Whentheseconditionsexist, alowpulsewillbegeneratedontheINTlinetogettheattentionofthemicrocontroller.These conditionsareatransmitterdataregisterempty,transmitteridle,receiverdataavailable,receiver overrun,addressdetectandanRXpinwake-up.Whenanyoftheseconditionsarecreated,ifits correspondinginterruptcontrolisenabledandthestackisnotfull,theprogramwilljumptoits correspondinginterruptvectorwhereitcanbeservicedbeforereturningtothemainprogram.Four oftheseconditionshavethecorrespondingUSRregisterflagswhichwillgenerateaUARTinterrupt ifitsassociatedinterruptenablecontrolbitintheUCR2registerisset.Thetwotransmitterinterrupt conditionshavetheirowncorrespondingenablecontrolbits,whilethetworeceiverinterrupt conditionshaveasharedenablecontrolbit.Theseenablebitscanbeusedtomaskoutindividual UARTinterruptsources. Theaddressdetectcondition,whichisalsoaUARTinterruptsource,doesnothaveanassociated flag,butwillgenerateaUARTinterruptwhenanaddressdetectconditionoccursifitsfunction isenabledbysettingtheADDENbitintheUCR2register.AnRXpinwake-up,whichisalsoa UARTinterruptsource,doesnothaveanassociatedflag,butwillgenerateaUARTinterruptif themicrocontrolleriswokenupbyafallingedgeontheRXpin,iftheWAKEandRIEbitsinthe UCR2registerareset.NotethatintheeventofanRXwake-upinterruptoccurring,therewillbea certainperiodofdelay,commonlyknownastheSystemStart-upTime,fortheoscillatortorestart andstabilizebeforethesystemresumesnormaloperation. NotethattheUSRregisterflagsarereadonlyandcannotbeclearedorsetbytheapplication program,neitherwilltheybeclearedwhentheprogramjumpstothecorrespondinginterrupt servicingroutine,asisthecaseforsomeoftheotherinterrupts.Theflagswillbecleared automaticallywhencertainactionsaretakenbytheUART,thedetailsofwhicharegiveninthe UARTregistersection.TheoverallUARTinterruptcanbedisabledorenabledbytherelated interruptenablecontrolbitsintheinterruptcontrolregistersofthemicrocontrollertodecidewhether theinterruptrequestedbytheUARTmoduleismaskedoutorallowed. US R Re gi st er Tr ans mi tte r Em pt y Fl ag T XI F Tr ans mi tt er Id le Fl ag T ID LE Re ce iv er D at a Av ai la bl e RX IF Re ce iv er O ve rr un Fl ag O ER R RX 7 if B NO =0 RX 8 if B NO =1 AD DE N 0 1 0 1 RX P in Wa ke -u p WA KE 0 1 UCR2 R e g is te r TE IE TI IE RI E UCR 2 R egi st er 0 1 0 1 0 1 OR To M CU P IN T in te rr up t i nput IN T UART Module Interrupt Structure |
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