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4

ADC Evaluation

4.1

Hardware Selection

4.1.1

Analog Input Signal Generator

4.1.2

Clock Signal Generator

ADC Evaluation

This section describes how to set up a typical ADC evaluation system that is similar to what TI uses to

perform testing for data-sheet generation. Consequently, the information in this section is generic in nature

and is applicable to all high-speed, high-resolution ADC evaluations. This section covers signal tone

analysis, which yields ADC data-sheet figures of merit such as signal-to-noise ratio (SNR) and spurious

free dynamic range (SFDR).

To reveal the true performance of the ADC under evaluation, great care should be taken in selecting both

the ADC signal source and ADC clocking source.

When choosing the quality of the ADC analog input source, consider both harmonic distortion performance

of the signal generator and the noise performance of the source.

In many cases, the harmonic distortion performance of the signal generator is inferior to that of the ADC,

and additional filtering is needed if users expect to reproduce the ADC SFDR numbers found in the data

sheet. Users can easily evaluate the harmonic distortion of their signal generator by hooking it directly to a

spectrum analyzer and measuring the power of the output signal and comparing that to the power of the

integer multiples of the output-signal frequency. If the harmonic distortion is worse than the ADC under

evaluation, the ADC digitizes the performance of the signal generator and the true ADC SFDR is masked.

To alleviate this, it is recommended that users provide additional LC filtering after the signal generator

output.

Another important metric when deciding on a signal generator is its noise performance. As with the

distortion performance, if the noise performance is worse than that of the ADC under evaluation, the ADC

digitizes the performance of the source. Noise can be broken into two components, broadband noise and

close-in phase noise. Broadband noise can be improved by the LC filter added to improve distortion

performance; however, the close-in phase noise typically cannot be improved by additional filtering.

Therefore, when selecting an analog signal source, it is important to review the manufacturer's

phase-noise plots and take care to choose a signal generator with the best phase-noise performance.

Equally important in the high-performance ADC evaluation setup is the selection of the clocking source.

Most modern ADCs, the ADS61xx included, accept either a sinusoidal or a square-wave clock input. The

key metric in selecting a clocking source is selecting a source with the lowest jitter. This becomes

SNR (dBc) = 20 log (2

π × f

In theory, a square-wave source with femtosecond jitter would be ideal for an ADC evaluation setup.

However, in practical terms, most commercially available square-wave generators offer jitter measured in

picoseconds, which is too great for high-resolution ADC evaluation setups. Therefore, most evaluation

setups rely on the ADC internal clock buffer to convert a sinusoidal input signal into an ultralow-jitter

square wave. When selecting a sinusoidal clocking source, it has been shown that phase noise has a

direct impact on jitter performance. Consequently, great scrutiny should be applied to the phase-noise

performance of the clocking signal generator. TI has found that high-Q monolithic crystal filters can

improve the phase noise of the signal generator, and these filters become essential elements of the

evaluation setup when high ADC input frequencies are being evaluated.

SLAU205 – January 2008

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