Dual/Doubler Interleaved MOSFET Driver

October 27, 2011 | FINAL | V1.09

6

IR3598

PIN DESCRIPTIONS

PIN #

PIN NAME

PIN DESCRIPTION

1

BOOT1

Floating bootstrap supply pin for the upper gate drive HG1. Connect the bootstrap capacitor between this pin

and the SW1 pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. See the Internal

Bootstrap Device section under DESCRIPTION for guidance in choosing the capacitor value.

2

MODE

The MODE pin is an input signal used to set the PWM MODE (Tri-State or IR ATL) of the drivers.

The MODE pin levels are controlled by connecting the MODE pin to Ground or connecting to VCC. Refer to the

configuration instructions in Table 1 to program the mode pin. Do not let this pin float. The mode pin must be

directly connected to ground when this is the connection. Do not connect through a resistor when connecting

to ground.

3

VDRV

Connect this pin to a separate supply voltage between 4.0V and 13.2V to vary the drive voltage

on both the high side and low side MOSFET’s. Place a high quality low ESR ceramic capacitor from this pin to

GND. Note that on the high side MOSFET’s, the gate drive voltage will be VDRV less the boot strap diode voltage

drop.

4

BOOT2

Floating bootstrap supply pin for the upper gate drive HG2. Connect the bootstrap capacitor between this pin

and the SW2 pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. See the Internal

Bootstrap Device section under DESCRIPTION for guidance in choosing the capacitor value.

5

SW2

Connect this pin to the SOURCE of the upper MOSFET and the DRAIN of the lower MOSFET of the second power

stage, driven by HG2 and LG2. This pin provides a return path for the upper gate drive.

6

HG2

Upper gate drive output of Driver 2. Connect to gate of high-side power N-Channel MOSFET of the second

power stage.

7

LG2

Lower gate drive output of Driver 2. Connect to gate of the low-side power N-Channel MOSFET

of the second power stage.

8

PWM2

The PWM2 signal is the control input for the second driver from either an IR ATL compatible source or an

industry standard Tri-State source. Connect this pin to the PWM output of the controller.

As a DUAL driver, PWM2 controls the behavior of Gate Driver 2 (HG2, LG2). In DOUBLER mode this pin is not

used and must be left open.

9

EN

The chip will be enabled with the EN pin left open, or pulled high to VCC.

10

NC

This pin must be left open.

11

VCC

Connect this pin to a +5V bias supply. Place a high quality low ESR 0.1uF ceramic capacitor from this pin to the

IR3598 GND.

12

FUNCTION

The FUNCTION pin controls the Phase Mode (Dual or Doubler Modes). The FUNCTION pin levels are controlled

by connecting the FUNCTION pin to Ground or VCC. Refer to the configuration instructions in Table 1 to

program the FUNCTION pin. At power up, the function pin selection

is latched into the IR3598, and therefore cannot be changed after initial power up.

13

PWM1

The PWM1 signal is the control input for the first driver from either an IR ATL compatible source

or an industry standard Tri-State source. Connect this pin to the PWM output of the controller.

As a DUAL driver, PWM1 controls the behavior of Gate Driver 1 (HG1, LG1). In DOUBLER mode

PWM1 controls the behavior of Gate Drive 1 (HG1, LG1) and Gate Drive 2 (HG2, LG2).

14

LG1

Lower gate drive output of Driver 1. Connect to gate of the low-side power N-Channel MOSFET

of the first power stage.

15

HG1

Upper gate drive output of Driver 1. Connect to gate of high-side power N-Channel MOSFET

of the first power stage.

16

SW1

Connect this pin to the SOURCE of the upper MOSFET and the DRAIN of the lower MOSFET of the first power

stage. This pin provides a return path for the upper gate drive.

(PAD) 17

GND

Bias and reference ground. All signals are referenced to this node. It is also the power ground return of the

driver.