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IR3598MPBF Datasheet(PDF) 15 Page - International Rectifier

Part # IR3598MPBF
Description  Dual/Doubler Interleaved MOSFET Driver
PDF  20 Pages
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Manufacturer  IRF [International Rectifier]
Direct Link  http://www.irf.com
Logo IRF - International Rectifier

IR3598MPBF Datasheet(HTML) 15 Page - International Rectifier

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Dual/Doubler Interleaved MOSFET Driver
October 27, 2011 | FINAL | V1.09
15
IR3598
GENERAL DESCRIPTION
The IR3598 contains two high-efficiency, fast High and
Low side MOSFET drivers with large source and sink
current capability. It can reliably drive the external
high- and low-side N-channel MOSFETs with large input
capacitance at switching frequencies up to 1MHz.
The patented IR Active Tri-Level (ATL) feature allows
complete control over enable and disable of both MOSFETs
using the PWM input signal from the controller. The timing
and voltage levels of ATL are shown in Figure 6.
Each IR3598 can be operated to drive two independent
pairs of MOSFETs in one of two operating modes which are
dual mode and doubler mode. In dual mode, two
independent PWM inputs control two separate and
independent gate drive outputs. Each driver functions in a
similar way to a single high-low MOSFET driver such as the
CHL8515. In doubler mode, the two independent drivers
are controlled by a single input signal at PWM1.
In normal switching modes, they operate 180° out of phase
with each other. The phase modes for dual and doubler
are shown in Figure 8. Detailed timing diagrams can be
seen in Figures 9 and 10.
During normal operation the PWM transitions between
low and high voltage levels to drive the low- and high-side
MOSFETs. The PWM signal falling edge transition to a low
voltage threshold initiates the high side driver turn off
after a short propagation delay, tPDL(HS). The dead time
control circuit monitors the High Gate signals and switch
voltages to ensure the high side MOSFET is turned off
before the Low Gate voltages are allowed to rise to turn
on the low-side MOSFET.
The PWM rising edge transition through the high-side turn
on threshold, initiates the turn off of the low-side MOSFET
after a small propagation delay, tPDL(LS). The adaptive dead
time circuit provides the appropriate dead time by
determining if the falling Low Gate voltage threshold has
been crossed before allowing the High Gate voltage to rise
and turn on the high-side MOSFET, tPDH(HS).
THEORY OF OPERATION
POWER-ON RESET (POR)
The IR3598 incorporates a power-on reset feature.
This ensures that both the high and low side output drivers
are made active only after the device supply voltage Vcc
and Vdrive both have exceeded a certain minimum
operating threshold. The Vcc and Vdrive supplies are
monitored and both the drivers are set to the low state,
holding both external MOSFETs off. Once both Vcc and
VDRV cross the rising POR threshold, the IR3598 (if in IR
ATL mode) is reset and the outputs are held in the low
state until a transition from tri-state to active operation is
detected at the PWM input. For Tri-state mode, the POR
operation is the same except the driver does not look for
an input tri-state before functioning. During normal
operation the drivers continue to remain active until the
Vcc falls below the falling POR threshold.
INTEGRATED BOOTSTRAP DIODE
The IR3598 features an integrated bootstrap diode to
reduce external component count. This enables the IR3598
to be used effectively in cost and space sensitive designs.
The bootstrap circuit is used to establish the gate voltage
for the high-side driver. It consists of a diode and capacitor
connected between the SW and BOOT pins of each device.
Integrating the diodes within the IR3598, results in the
need for an external boot capacitor only. The bootstrap
capacitor is charged through the diode and injects this
charge into the high-side MOSFET input capacitance when
PWM signal goes high.
IR ACTIVE TRI-LEVEL (ATL) PWM INPUT SIGNAL
The IR3598 gate drivers are driven by a patented active
tri-level PWM control signal provided by the IR digital
PWM controllers. During normal operation, the rising and
falling edges of the PWM signal transitions between 0V
and 1.8V to switch the LO_GATE and HI_GATE. To force
both driver outputs low simultaneously, the PWM signal
crosses a tri-state voltage level higher than the tri-state
HI_GATE threshold. This threshold based tri-state results in
a very fast disable for both the drivers, with only a small
tri-state propagation delay. MOSFET switching resumes
when the PWM signal falls below the tri-state threshold
into the normal operating voltage range.



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