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Atmel ATA5781 [Summary DATASHEET]

9286BS–RKE–06/13

1.2

System Overview

Figure 1-1.

Circuit Overview

Atmel ATA5781/2/3 is performed through the SPI pins SCK, MOSI, MISO, and NSS on port B. The configuration of the

Atmel ATA5781/2/3 is stored in the EEPROM and a large portion of the functionality is defined by the firmware located in the

ROM and processed by the AVR. An SPI command can trigger the AVR to configure the hardware according to settings that are

stored in the EEPROM and start up a given system mode (e.g., RXMode, or PollingMode). Internal events such as “Start of

Telegram” or “FIFO empty” are signaled to an external microcontroller on pin 28 (PB6/EVENT).

During the start-up of a service, the relevant part of the EEPROM content is copied to the SRAM. This allows faster access by

the AVR during the subsequent processing steps and eliminates the need to write to the EEPROM during runtime because

parameters can be modified directly in the SRAM. As a consequence the user does not need to observe the EEPROM

read/write cycle limitations.

It is important to note that all PWRON and NPWRON pins (PC1..5, PB4, PB7) are active in OFFMode. This means that even if

the Atmel ATA5781/2/3 is in OFFMode and the DVCC voltage is switched off, the power management circuitry within the

Atmel ATA5781/2/3 biases these pins with VS.

AVR ports can be used as button inputs, external LNA supply voltage (RX_ACTIVE), LED drivers, EVENT pin, switching control

for additional SPDT switches, general purpose digital inputs, or wake-up inputs, etc. Some functionality of these ports is already

implemented in the firmware and can be activated by adequate EEPROM configurations. Other functionality is available only

through custom software residing in the 20Kbyte Flash program memory (Atmel ATA5781) or in the 20Kbyte user ROM

program memory (Atmel ATA5782).

Rx DSP

RF

Front End

RFIN

DATA BUS

SRC, FRC

Oscillators

Port B (8)

XTO

XTAL

PB[7..0]

(SPI)

PC[5..0]

Port C (6)

AVR CPU

Supply

Reset