DM163006 datasheet(207/320 Pages) MICROCHIP

207 / 320 page

 2001 Microchip Technology Inc.

Advance Information

DS39541A-page 207

PIC18C601/801

19.0

SPECIAL FEATURES OF THE

CPU

There are several features intended to maximize

system reliability, minimize cost through elimination of

external components and provide power saving

operating modes:

• OSC Selection

• RESET

- Power-on Reset (POR)

- Power-up Timer (PWRT)

- Oscillator Start-up Timer (OST)

• Interrupts

• Watchdog Timer (WDT)

• SLEEP

• ID Locations

PIC18C601/801 devices have a Watchdog Timer,

which can be permanently enabled/disabled via the

configuration bits, or it can be software controlled. By

default, the Watchdog Timer is disabled to allow soft-

ware control. It runs off its own RC oscillator for cost

reduction. There are two timers that offer necessary

delays on power-up. One is the Oscillator Start-up

Timer (OST), intended to keep the chip in RESET until

the crystal oscillator is stable. The other is the Power-

up Timer (PWRT), which provides a fixed delay on

power-up only, designed to keep the part in RESET

while the power supply stabilizes. With these two tim-

ers on-chip, most applications need no external

RESET circuitry.

SLEEP mode is designed to offer a very low current

Power-down mode. The user can wake-up from

SLEEP through external RESET, Watchdog Timer

Wake-up or through an interrupt. Several oscillator

options are also available to allow the part to fit the

application. The RC oscillator option saves system

cost, while the LP crystal option saves power. By

default, HS oscillator mode is selected. There are two

main modes of operations for external memory inter-

face: 8-bit and 16-bit (default). A set of configuration

bits are used to select various options.

19.1

Configuration Bits

The configuration bits can be programmed (read as ’0’),

or left unprogrammed (read as ’1’), to select various

device configurations. These bits are mapped starting

at program memory location 300000h.

The user will note that address 300000h is beyond the

user program memory space. In fact, it belongs to the

configuration memory space (300000h - 3FFFFFh),

which can only be accessed using table reads and

table writes.

TABLE 19-1:

CONFIGURATION BITS AND DEVICE IDs

File Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default/

Unprogrammed

Value

300001h

CONFIG1H

—

FOSC1

FOSC0

---- --11

300002h

CONFIG2L

—

PWRTEN

-1-- ---1

300003h

CONFIG2H

—

WDTPS2 WDTPS1

WDTPS0

WDTEN

---- 1110

300006h

CONFIG4L

—

STVREN

1--- ---1

3FFFFEh

DEVID1

DEV2

DEV1

DEV0

REV4

REV3

REV2

REV1

REV0

0000 0000

3FFFFFh

DEVID2

DEV10

DEV9

DEV8

DEV7

DEV6

DEV5

DEV4

DEV3

0000 0000

Legend: x = unknown, u = unchanged, - = unimplemented, q = value depends on condition, r = reserved, maintain ‘1’.

Shaded cells are unimplemented, read as ’0’.

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