LM73 datasheet(5/26 Pages) TI1

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LM73

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SNIS141D – OCTOBER 2005 – REVISED MAY 2009

TEMPERATURE-TO-DIGITAL CONVERTER CHARACTERISTICS (continued)

Unless otherwise noted, these specifications apply for VDD = 2.7V to 5.5V. Boldface limits apply for TA = TJ =TMIN to TMAX;

all other limits TA = TJ = +25°C, unless otherwise noted. TA is the ambient temperature. TJ is the junction temperature.

LM73C

Units

Parameter

Conditions

Typical(1)

Limits(2)

(Limit)

Temperature Conversion

RES1 Bit = 0, RES0 Bit = 0

10.1

ms (max)

Time(4)

RES1 Bit = 0, RES0 Bit = 1

20.2

ms (max)

RES1 Bit = 1, RES0 Bit = 0

40.4

ms (max)

RES1 Bit = 1, RES0 Bit = 1

80.8

112

ms (max)

Quiescent Current

Continuous Conversion Mode, SMBus inactive

320

495

µA (max)

Shutdown, bus-idle timers on

120

175

µA (max)

Shutdown, bus-idle timers off

1.9

µA (max)

Power-On Reset Threshold

Measured on VDD input, falling edge

0.9

V (min)

(4)

This specification is provided only to indicate how often temperature data is updated. The LM73 can be read at any time without regard

to conversion state (and will yield last conversion result).

LOGIC ELECTRICAL CHARACTERISTICS - DIGITAL DC CHARACTERISTICS

Unless otherwise noted, these specifications apply for VDD = 2.7V to 5.5V. Boldface limits apply for TA = TJ = TMIN to TMAX;

all other limits TA = TJ = +25°C, unless otherwise noted. TA is the ambient temperature. TJ is the junction temperature.

Symbol

Parameter

Conditions

Typical(1)

Limits(2)

Units

(Limit)

SMBDAT, SMBCLK INPUTS

VIH

Logical “1” Input Voltage

0.7*VDD

V (min)

VIL

Logical “0” Input Voltage

0.3*VDD

V (max)

VIN;HYST

SMBDAT and SMBCLK Digital Input

0.07*VDD

Hysteresis

IIH

Logical “1” Input Current

VIN = VDD

0.01

µA (max)

IIL

Logical “0” Input Current

VIN = 0 V

–0.01

–2

µA (max)

CIN

Input Capacitance

SMBDAT, ALERT OUTPUTS

IOH

High Level Output Current

VOH = VDD

0.01

µA (max)

VOL

SMBus Low Level Output Voltage

IOL = 3 mA

0.4

V (max)

ADDRESS INPUT

VIH;ADDRESS

Address Pin High Input Voltage

VDD minus 0.100

V (min)

VIL;ADDRESS

Address Pin Low Input Voltage

0.100

V (max)

IIH;ADDRESS

Address Pin High Input Current

VIN = VDD

0.01

µA (max)

IIL;ADDRESS

Address Pin Low Input Current

VIN = 0 V

–0.01

–2

µA (max)

(1)

Typicals are at TA = 25°C and represent most likely parametric norm.

(2)

Limits are ensured to TI's AOQL (Average Outgoing Quality Level).

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