MP8736– HIGHEFFICIENCY,FAST TRANSIENT,6A, 19V SYNCHRONOUSBUCKCONVERTERIN ATINY3X4mmPACKAGE

MP8736 Rev. 1.34

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18

4/18/2012

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Cdc in a reasonable value without affecting the

system start up. Be noted that even when the

Cdc is applied, the load and line regulation are

still Vramp related.

Figure11—Simplified Circuit of Ceramic

Capacitor with DC blocking capacitor

Input Capacitor

The input current to the step-down converter is

discontinuous. Therefore, a capacitor is required

to supply the AC current to the step-down

converter while maintaining the DC input voltage.

Ceramic capacitors are recommended for best

performance. In the layout, it’s recommended to

put the input capacitors as close to the IN pin as

possible.

The

capacitance

varies

significantly

over

temperature. Capacitors with X5R and X7R

ceramic dielectrics are recommended because

they are fairly stable over temperature.

The capacitors must also have a ripple current

rating greater than the maximum input ripple

current of the converter. The input ripple current

can be estimated as follows:

OUT

OUT

CIN

OUT

IN

IN

VV

II

(1

)

VV

=×

× −

(18)

where:

OUT

CIN

I

I

2

=

(19)

For simplification, choose the input capacitor

whose RMS current rating is greater than half of

the maximum load current.

The input capacitance value determines the input

voltage ripple of the converter. If there is input

voltage ripple requirement in the system design,

choose the input capacitor that meets the

specification

The input voltage ripple can be estimated as

follows:

OUT

OUT

OUT

IN

SW

IN

IN

IN

IV

V

V(1

)

FC

V

V

Δ=

×

× −

×

(20)

The worst-case condition occurs at VIN = 2VOUT,

where:

OUT

IN

SW

IN

I

1

V

4F

C

Δ= ×

×

(21)

Output Capacitor

The output capacitor is required to maintain the

DC output voltage. Ceramic or POSCAP

capacitors are recommended. The output voltage

ripple can be estimated as:

OUT

OUT

OUT

ESR

SW

IN

SW

OUT

VV

1

V(1

) (R

)

FL

V

8 F

C

Δ=

× −

×

+

××

×

(22)

In the case of ceramic capacitors, the impedance

at the switching frequency is dominated by the

capacitance. The output voltage ripple is mainly

caused by the capacitance. For simplification, the

output voltage ripple can be estimated as:

OUT

OUT

OUT

2

SW

OUT

IN

VV

V(1

)

8F

L C

V

Δ=

× −

×× ×

(23)

The output voltage ripple caused by ESR is very

small. Therefore, an external ramp is needed to

stabilize the system. The external ramp can be

generated through resistor R4 and capacitor C4

following equation 5, 8 and 9.

In the case of POSCAP capacitors, the ESR

dominates the impedance at the switching

frequency. The ramp voltage generated from the

ESR is high enough to stabilize the system.

Therefore, an external ramp is not needed. A

minimum ESR value around 12mΩ is required to

ensure stable operation of the converter. For

simplification,

the

output

ripple

can

be

approximated as:

OUT

OUT

OUT

ESR

SW

IN

VV

V(1

) R

FL

V

Δ=

× −

×

×

(24)

Inductor

The inductor is required to supply constant

current to the output load while being driven by

the switching input voltage. A larger value

inductor will result in less ripple current that will