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AM79C983A Datasheet(PDF) 40 Page - Advanced Micro Devices |
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AM79C983A Datasheet(HTML) 40 Page - Advanced Micro Devices |
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40 / 60 page ![]() 40 Am79C983A PRELIMINARY etherStatsBroadcastPkts Address: 1110 0010 The value in this register represents the total number of valid packets received that were addressed to a broadcast address. etherStatsMulticastPkts Address: 1110 0011 The value in this register represents the total number of valid packets received that were addressed to a multicast address. etherStatsCRCAlignErrors Address: 1110 0100 The value in this register represents the total number of packets received that were between 64 and 1518 octets, inclusive, and had either FCS errors or alignment errors. etherStatsUndersizePkts Address: 1110 0101 The value in this register represents the total number of packets received that were less than 64 octets long, but were otherwise error free. etherStatsOversizePkts Address: 1110 0110 The value in this register represents the total number of packets received that were greater than 1518 octets long, but were otherwise error free. etherStatsFragments Address: 1110 0111 The value in this register represents the total number of packets received that were less than 64 octets long, not including the preamble or SFD, and had either an FCS error or an alignment error. etherStatsJabbers Address: 1110 1000 The value in this register represents the total number of packets that were greater than 1518 octets long and had either FCS errors or alignment errors. Note: This differs from the IEEE definition of Jabber. etherStatsCollisions Address: 1110 1001 The value in this register represents the total number of collisions on the IMR2 device. etherStats64Octets Address: 1110 1010 The value in this register represents the total number of packets (including error packets) that were 64 octets long. etherStats65to127Octets Address: 1110 1011 The value in this register represents the total number of packets (including error packets) that were 65 octets to 127 octets long inclusive. etherStats128to255Octets Address: 1110 1100 The value in this register represents the total number of packets (including error packets) that were 128 octets to 255 octets long inclusive. etherStats256to511Octets Address: 1110 1101 The value in this register represents the total number of packets (including error packets) that were 256 octets to 511 octets long inclusive. etherStats512to1023Octets Address: 1110 1110 The value in this register represents the total number of packets (including error packets) that were 512 octets to 1023 octets long inclusive. etherStats1024to1518Octets Address: 1110 1111 The value in this register represents the total number of packets (including error packets) that were 1024 octets to 1518 octets long inclusive. Activity Address: 1111 0000 The value in this register represents the total number of octets that were active on the IMR2 device. Register Bank 7: Management Support These registers control packet compression and error sampling. The Management Support Registers can be accessed by writing 0000 0111 to the C Register and then writing the register address to the C Register. Device ID Address: 1110 0000 The Device ID Register is a read/write register. It is an 8-bit register and contains the assigned ID number of the IMR2 device. This number is transmitted as part of the tag field by the Packet Report Port. Sample Error Status Address: 1110 0010 Sample Error Status gives statistical data on packets that have errors. It is a 4-deep 8-byte FIFO. Each read re- quires accessing the data register eight times. The ac- cess can jump to the next level of the FIFO in the middle of a read by writing any value to the node processor port with the C/D pin HIGH. If the node processor port is ac- cessed (with the C/D pin LOW) after the last byte is read, |
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