AM79C983A datasheet(48/60 Pages) AMD

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Am79C983A

PRELIMINARY

Figure 10. PR Port Connection to an Am79C90 C-Lance

Port Switching

Port switching allows the movement of individual ports

between multiple Ethernet collision domains via soft-

ware. This capability enables the network manager to

optimize network performance by dynamically balanc-

ing the loads on a network. As an example, a port ex-

hibiting a high level of activity can be moved to a less

congested collision domain.

The method of implementing port switching with the

IMR2/QuIET chip set is to connect a single transceiver

port to multiple IMR2 devices. The number of IMR2 de-

vices will equal the number of backplanes supported in

the hub. 11 is a simpliﬁed schematic showing a hub

with three separate backplanes. Only one QuIET de-

vice is shown for simplicity, although it is expected that

most applications will use three QuIET devices to en-

able 12 port multiples.

The following discussion of port switching will con-

sider only port 0; although, it is equally applicable to

all of the ports. At any time, PAUI

[0] is enabled on one,

and only one, IMR2 device. As a result, port 0 is trans-

ferred to whichever IMR2 device has PAUI

[0] enabled.

The other two IMR2 devices will have PAUI

[0]

disabled with PDO

[0] in a high impedance state. To

move port 0 to another backplane, the software will

disable PAUI

[0] on the active IMR2 device and enable

PAUI

[0] on the targeted IMR2 device that represents

the desired backplane. Pseudo AUI ports can be

disabled or enabled by setting the appropriate bit in

the Port Switching Control Register.

Although there are multiple IMR2 devices, only one has

management control of the QuIET devices. 11 shows

IMR2 device 0 having management control. The other

two devices do not have any control over the conﬁgura-

tion of the QuIET devices.

The number of IMR2 devices that can be connected to-

gether is limited by the load on the PAUI drivers. The

PAUI will operate reliably with a load up to 100 pF. On

a system that uses sockets for the IMR2 devices, the

maximum number of devices is six. This number can in-

crease as long as the total load capacitance is kept

below 100 pF.

COL

JAM

MACEN

DAT

4.9 k

Ω

+5 V

ECLK

Clock

Generator

CLSN

RCLK

RENA

TENA

TCL

Am79C90 (C-LANCE)

PCLK

PDRV

PDAT

PENAI

PENAO

19879B-14

AM79C983A Datasheet(PDF) 48 Page - Advanced Micro Devices

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