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APU428 Datasheet(PDF) 18 Page - Aplus Intergrated Circuits |
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APU428 Datasheet(HTML) 18 Page - Aplus Intergrated Circuits |
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18 / 18 page ![]() Instruction Machine Code Function Flag/Remark ALM X 1111 101X XXXX XXXX X8,7,6=111: FREQ X8,7,6=100: DC1 X8,7,6=011: PH3 X8,7,6=010: PH4 X8,7,6=001: PH5 X8,7,6=000: DC0 X5~0 PH15~10 ELC X 1111 110X XXXX XXXX X8=1 BCLKX X8=0 PH0 X7,6=11 BCLK/8 X7,6=10 BCLK/4 X7,6=01 BCLK/2 X7,6=00 BCLK X5,4=11 1/1 X5,4=10 1/2 X5,4=01 1/3 X5,4=00 1/4 X3,2=11 PH5 X3,2=10 PH6 X3,2=01 PH7 X3,2=00 PH8 X1,0=11 1/1 X1,0=10 1/2 X1,0=01 1/3 X1,0=00 1/4 ELP – CLK BCLKX ELP – DUTY ELC – CLK ELC – DUTY HALT 1111 1110 0000 0000 HALT operation STOP 1111 1111 0000 0000 STOP operation Symbol description AC: Accumulator D: Immediate data ACn: Accumulator bit-n PC: Program counter X: Address CF: Carry flag Rx: Memory of address X Rxn: Memory bit-n of address X WDF: Watchdog timer enable flag Ry: Memory of working register Y HL: Index register BCF: Back-up flag BCLK: System clock address @HL: Memory of index RAM IEFn: Interrupt enable flag HRFn: HALT release flag SRFn: Stop release enable flag HEFn: HALT release enable flag SCFn: Start condition flag Cfq: Clock source of frequency generator Cch: Clock source of chartering detector Ctm: Clock source of timer TMR: Timer overflow release flag PDV: Predivider SEFn: Switch enable flag Lz: LCD latch FREQ: Frequency generator setting value T@HL: Memory of index ROM ADF: ADC flag CSF: Clock source flag DAC: Digital-to-analog converter output signal LBR: Low-battery voltage reference L: Low address of index H: High address of index RFOVF: RFC overflow flag HT@HL: High nibble of index ROM LT@HL: Low nibble of index ROM Preliminary 18 Ver. 0.0 APU428 |
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