AS8506 datasheet(67/89 Pages) AMSCO

67 / 89 page

ams Datasheet, Confidential:2013-Sep [1-00]

AS8506 – 67

Devic e I n te r f ac e

Figure 77:

Timer Control Register

Figure 78:

Reference DAC Code LSB Register

Address

Features and Bit Description

SPI4

SPI3

POR

Value

0x1E

timer_cntl_reg

D2:D0

000

→ 25% duty cycle

001

→ 15% duty cycle

010

→ 20% duty cycle

011

→ 30% duty cycle

100

→ 35% duty cycle

101

→ 40% duty cycle

110

→ 45% duty cycle

111

→ 50% duty cycle

R/W

0000_0000

POR_VSUP

D4:D3

→ 1s time slot

→ 8s time slot

→ 16s time slot

→ 32s time slot

D6:D5

→ 100 KHz

→ 25 KHz

→ 50 KHz

→ 200 KHz

→ 5 clock cycles for

comparator

→ 15 clock cycles for

comparator

Address

Features and Bit Description

SPI4

SPI3

POR

Value

0x1F

ref_dcod_lsb_reg

Least Significant byte of 12-bit DAC

code for setting reference voltage.

R/W

0000_0000

POR_VSUP

D7:D0

Bit7 to Bit0 of DAC

code

AS8506 Datasheet(PDF) 67 Page - ams AG

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