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AS8506 Datasheet(PDF) 40 Page - ams AG

Part # AS8506
Description  Battery Cell Monitor and Balancer IC
PDF  89 Pages
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Manufacturer  AMSCO [ams AG]
Direct Link  http://www.ams.com
Logo AMSCO - ams AG

AS8506 Datasheet(HTML) 40 Page - ams AG

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AS8506 – 40
ams Datasheet, Confidential:2013-Sep [1-00]
Devic e I n te r f ac e
Figure 32:
SPI Write Operation with Negative Clock Polarity and 1 Byte of Data Field
Figure 33:
SPI Write Operation with Positive Clock Polarity and 1 Byte of Data Field
In case of SPI block write operation, first data byte is written
into addressed register same as single byte write operation.
After first data byte, Master can send next data byte by keeping
CS ‘Low’ and giving clock on SCLK as per polarity selection. At
the end of every eighth data bit, the byte is written into next
consecutive address location (internally address is incremented
by one location). In this way, Master can continue writing into
consecutive address locations. The waveform is shown in
Figure 34.
R0
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
SCLK
SDI
SDO
SCSN
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
Sampling Edge
High Impedance Sate
SCLK
SDI
SDO
SCSN
R0
A5



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