AS8506 datasheet(43/89 Pages) AMSCO

43 / 89 page

ams Datasheet, Confidential:2013-Sep [1-00]

AS8506 – 43

Devic e I n te r f ac e

In case of SPI block read operation, first data byte is read from

addressed register same as single byte read operation. After

first data byte read, Master can read next consecutive addressed

data by keeping CS ‘Low’ and giving clock on SCLK as per clock

polarity selection. At the end of every eighth data bit, the

address pointer is incremented to next consecutive address

location. In this way Master can continue reading from

consecutive register address locations. The waveform is shown

in Figure 37.

Figure 37:

SPI Block Read Operation with Negative Clock Polarity

Address Allocation Process

During the system configuration the microcontroller has to

allocate a unique address to each of the AS8506 devices

including the Master to communicate with SPI3. The

microcontroller before initiating the address allocation process,

it writes top most device address into allcd_dev_add_reg of the

Master through 4-wire SPI. The microcontroller can initiate the

address allocation process by writing ‘100’ command code and

setting D0 to 1 in spi3_cmd_reg register. By sighting ‘1’ at

spi3_cmd_reg [0], the Master initiates a SPI3 address allocation

write with top most device address as data. The address

“000000” is reserved as broadcast address visible to all devices.

The address allocation process is explained for six AS8506

devices (including Master) stack system in Figure 38.

SCLK

SDI

SDIO

Data D7-D0 at

Address A5-A0

is read here

Data D7-D0 at

Address A5-A0 +1

is read here

Data D7-D0 at

Address A5-A0 +2

is read here

Data D7-D0 at

Address A5-A0 +3

is read here

Data D7-D0 at

Address A5-A0 +4

is read here

AS8506 Datasheet(PDF) 43 Page - ams AG

AS8506 Datasheet(HTML) 43 Page - ams AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89

Datasheet Download

Link URL