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AS8506 Datasheet(PDF) 31 Page - ams AG |
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AS8506 Datasheet(HTML) 31 Page - ams AG |
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31 / 89 page ![]() ams Datasheet, Confidential:2013-Sep [1-00] AS8506 – 31 Detaile d Desc rip t ion enters into SLEEP mode. In the WAIT period all power blocks are ON, all analog blocks are ON and digital is also functional. In this mode, power consumption is lesser than NORMAL mode because there are no charge balancing activities being carried out. Wake Mode This is also a transition mode, where the device does initialization after exiting SLEEP mode. In the SLEEP mode if AS8506 receives a wake pulse of width TWAKE, the device enters into WAKE mode. In the WAKE mode device enables the V5V LDO and waits for V5V_por_n signal. Once V5V_por_n signal becomes ‘High’, the device enters into WAIT mode. An example of Compare and Balance (active balance) phase sequence with respect to time is given in Figure 25. In this example it is assumed that only 6 cells are connected to AS8506 and comparators’ outputs at Diagnosis phase is “010010X”; Where: ‘0’ indicates respective cell voltage is less than target voltage and needs charging. ‘1’ indicates respective cell voltage is more than target voltage and needs charging. ‘X’ indicates no cell is connected to respective comparator and output is neglected. Figure 25: Diagnosis and Balance Phase with Time Sequence for AS8506 Balance Phase Compare Phase Compare Phase PWM PWM PWM PWM Charging Charging Charging Charging Cell Connected Vcell1 < Vrdiv Need Charging Idle Time Idle Time Idle Time Cell Connected Vcell2 > Vrdiv Don’t Need Charging Cell Connected Vcell3 < Vrdiv Need Charging Cell Connected Vcell4 < Vrdiv Need Charging Cell Connected Vcell6 < Vrdiv Need Charging Cell Connected Vcell5 > Vrdiv Don’t Need Charging Cell Not Connected Tc_slot Tc_slot Tc_slot Tc_slot Tc_slot Tc_slot Tc_slot |
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