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TMD37821 Datasheet(PDF) 14 Page - ams AG |
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TMD37821 Datasheet(HTML) 14 Page - ams AG |
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14 / 34 page ![]() TMD3782 – 14 Datasheet - Mar. 2013 - V2 Interface and control are accomplished through an I2C serial compatible interface (standard or fast mode) to a set of registers that provide access to device control functions and output data. The devices support the 7-bit I2C addressing protocol. The I2C standard provides for three types of bus transaction: read, write, and a combined protocol (Figure TMD3782 - 23). During a write operation, the first byte written is a command byte followed by data. In a combined protocol, the first byte written is the command byte followed by reading a series of bytes. If a read command is issued, the register address from the previous command will be used for data access. Likewise, if the MSB of the command is not set, the device will write a series of bytes at the address stored in the last valid command with a register address. The command byte contains either control information or a 5-bit register address. The control commands can also be used to clear interrupts. The I2C bus protocol was developed by Philips (now NXP). For a complete description of the I2C protocol, please review the NXP I2C design specification at http://www.i2c-bus.org/references/. Figure TMD3782 – 23: I2C Write, Read and Combined Protocols I2C Protocol Acknowledge (0) Not Acknowledged (1) Stop Condition Read (1) Start Condition A N P R S Repeated Start Condition Write (0) Continuation of Protocol Master - to - Slave Slave -to -Master Sr W |
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