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DS2172 Datasheet(PDF) 14 Page - Dallas Semiconductor

Part # DS2172
Description  Bit Error Rate Tester BERT
PDF  21 Pages
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Manufacturer  DALLAS [Dallas Semiconductor]
Direct Link  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS2172 Datasheet(HTML) 14 Page - Dallas Semiconductor

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DS2172
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IMR: INTERRUPT MASK REGISTER (Address=15 Hex)
(MSB)
(LSB)
-
RA1
RA0
RLOS
BED
BCOF
BECOF
SYNC
SYMBOL
POSITION
NAME AND DESCRIPTION
-IMR.7
Not Assigned. Should be set to 0 when written to.
RA1
IMR.6
Receive All 1s.
0 = interrupt masked
1 = interrupt enabled
RA0
IMR.5
Receive All 0s.
0 = interrupt masked
1 = interrupt enabled
RLOS
IMR.4
Receive Loss Of Sync.
0 = interrupt masked
1 = interrupt enabled
BED
IMR.3
Bit Error Detection.
0 = interrupt masked
1 = interrupt enabled
BCOF
IMR.2
Bit Counter Overflow.
0 = interrupt masked
1 = interrupt enabled
BECOF
IMR.1
Bit Error Count Overflow.
0 = interrupt masked
1 = interrupt enabled
SYNC
IMR.0
Sync.
0 = interrupt masked
1 = interrupt enabled



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