* This specification is subject to be changed without notice.

4.17.2000

EM78P860

8 -BIT MICRO-CONTROLLER

5

EVENT

T

P

REMARK

WDT TIME OUT

0

0

sleep mode

WDT time out (not sleep mode

0

1

/RESET wake up from sleep

1

0

power up

1

1

Low pulse on /RESET

x

x

x . . don't care

R0

R1(TCC)

R2(PC)

R3(STATUS)

R4(RSR)

R5(ROM PAGE)

R6(PORT6)

R7(PORT7)

R8(PORT8)

R9(PORT9)

RA(CLK)

RB()

RC(2.5K RAM ADRESS)

RD(2.5K RAM DATA)

RE

RF(INT FLAG)

00

01

02

03

04

05

06

07

08

09

0A

0B

0C

0D

0E

0F

10

:

1F

20

:

3F

16x8

Common

Register

IOC6

IOC7

IOC8

IOC9

IOCA

IOCB(LCD ADDRESS)

IOCC(LCD DATA)

IOCD(PULL HIGH)

IOCE(IO, LCD)

IOCF(INT CONTROL)

RC(ADDRESS) RD(DATA)

IOCB(COUNTER1)

IOCC(COUNTER2)

BANK0~BANK3

32X8 ~ 32X8

REGISTER

0

:

255

BAND1

256X8

BAND1

256X8

BAND10

256X8

page0

page1

. . . . . . . . . . . .

. . . . . . . . . . . .

ADDRESS

REGISTER

CONTROL REGISTER

(PAGE0)

CONTROL REGISTER

(PAGE1)

4.

R3 ( Status Register )

765

432

1

0

-

PAGE

-

T

P

Z

DC

C

• Bit 0 (C) :

Carry flag

• Bit 1 (DC) :

Auxiliary carry flag

• Bit 2 (Z) :

Zero flag

• Bit 3 (P) :

Power down bit. Set to 1 during power on or by a “WDTC” command and reset to 0 by a “SLEP”

command.

• Bit 4 (T) :

Time-out bit. Set to 1 by the “SLEP” and “WDTC” command, or during power up and reset to 0 by

WDT time out.

• Bit 5 : unused

• Bit 6 PAGE : changed IOCB~IOCE to another page, 0/1

→page0/page1

• Bit 7 unused

Fig. 5 Data memory configuration