LP3907 datasheet(23/57 Pages) TI1

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VIN

80:

IPFM = 66 mA +

VIN

160:

IMODE < 66 mA

)

(Typically

LP3907

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SNVS511N – JUNE 2007 – REVISED AUGUST 2011

B. The peak PMOS switch current drops below the IMODE level

(3)

During PFM operation, the converter positions the output voltage slightly higher than the nominal output voltage

during PWM operation, allowing additional headroom for voltage drop during a load transient from light to heavy

load. The PFM comparators sense the output voltage via the feedback pin and control the switching of the output

FETs such that the output voltage ramps between 0.8% and 1.6% (typical) above the nominal PWM output

voltage. If the output voltage is below the ‘low’ PFM comparator threshold, the PMOS power switch is turned on.

It remains on until the output voltage exceeds the ‘high’ PFM threshold or the peak current exceeds the IPFM level

set for PFM mode. The typical peak current in PFM mode is:

(4)

Once the PMOS power switch is turned off, the NMOS power switch is turned on until the inductor current ramps

to zero. When the NMOS zero-current condition is detected, the NMOS power switch is turned off. If the output

voltage is below the ‘high’ PFM comparator threshold (see figure below), the PMOS switch is again turned on

and the cycle is repeated until the output reaches the desired level. Once the output reaches the ‘high’ PFM

threshold, the NMOS switch is turned on briefly to ramp the inductor current to zero and then both output

switches are turned off and the part enters an extremely low power mode. Quiescent supply current during this

‘sleep’ mode is less than 30µA, which allows the part to achieve high efficiencies under extremely light load

conditions. When the output drops below the ‘low’ PFM threshold, the cycle repeats to restore the output voltage

to ~1.6% above the nominal PWM output voltage.

If the load current should increase during PFM mode (see figure below) causing the output voltage to fall below

the ‘low2’ PFM threshold, the part will automatically transition into fixed-frequency PWM mode.

SW1, SW2 OPERATION

SW1 and SW2 have selectable output voltages ranging from 0.8V to 3.5V (typ.). Both SW1 and SW2 in the

LP3907 are I2C register controlled and are enabled by default through the internal state machine of the LP3907

following a Power-On event that moves the operating mode to the Active state. (see Power On Sequence). The

SW1 and SW2 output voltages revert to default values when the power on sequence has been completed. The

default output voltage for each buck converter is factory programmable. (See Application Notes).

SW1, SW2 CONTROL REGISTERS

SW1, SW2 can be enabled/disabled through the corresponding control register.

The Modulation mode PWM/PFM is by default automatic and depends on the load as described above in the

functional description. The modulation mode can be overridden by setting I2C bit to a logic 1 in the corresponding

buck control register, forcing the buck to operate in PWM mode regardless of the load condition.

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