| Electronic Components Datasheet Search |
|
LP3907 Datasheet(PDF) 25 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
LP3907 Datasheet(HTML) 25 Page - Texas Instruments |
|
25 / 57 page ![]() EN_T Vout Buck1 Vout Buck2 Vout LDO1 Vout LDO2 t2 t3 t4 t1 I 2 C Ext_Enable Pins Regulator ON Start Programmed Timing Sequence 0 1 EN_T LP3907 www.ti.com SNVS511N – JUNE 2007 – REVISED AUGUST 2011 POWER UP SEQUENCING USING THE EN_T FUNCTION EN_T assertion causes the LP3907 to emerge from Standby mode to Full Operation mode at a preset timing sequence. By default, the enables for the LDOs and Bucks (ENLDO1, ENLDO2, EN_T, ENSW1, ENSW2) are 500K internally pulled down, which causes the part to stay OFF until enabled. If the user wishes to use the preset timing sequence to power on the regulators, transition the EN_T pin from Low to High. Otherwise, simply tie the enables of each specific regulator HIGH to turn on automatically. EN_T is edge triggered with rising edge signaling the chip to power on. The EN_T input is deglitched and the default is set at 1ms. As shown in the next 2 diagrams, a rising EN_T edge will start a power-on sequence, while a falling EN_T edge will start a shutdown sequence. If EN_T is high, toggling the external enables of the regulators will have no effect on the chip. The regulators can also be programmed through I2C to turn on and off. By default, I2C enables for the regulators on ON. The regulators are on following the pattern below: Regulators on = (I2C enable) AND (External pin enable OR EN_T high). Note: The EN_T power-up sequencing may also be employed immediately after VIN is applied to the device. However, VIN must be stable for approximately 8ms minimum before EN_T be asserted high to ensure internal bias, reference, and the Flexible POR timing are stabilized. This initial EN_T delay is necessary only upon first time device power on for power sequencing function to operate properly. LP3907 Default Power-Up Sequence Table 4. Power-On Timing Specification Symbol Description Min Typ Max Units t1 Programmable Delay from EN_T assertion to VCC_Buck1 On 1.5 ms t2 Programmable Delay from EN_T assertion to VCC_Buck2 On 2 ms t3 Programmable Delay from EN_T assertion to VCC_LDO1 On 3 ms t4 Programmable Delay from EN_T assertion to VCC_LDO2 On 6 ms Copyright © 2007–2011, Texas Instruments Incorporated Submit Documentation Feedback 25 Product Folder Links: LP3907 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |