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AD5380

Data Sheet

MICROPROCESSOR INTERFACING

Parallel Interface

The AD5380 can be interfaced to a variety of 16-bit microcon-

trollers or DSP processors. Figure 35 shows the AD5380 family

interfaced to a generic 16-bit microcontroller/DSP processor.

The lower address lines from the processor are connected to

A0 to A5 on the AD5380. The upper address lines are decoded

to provide a CS, LDAC signal for the AD5380. The fast interface

timing of the AD5380 allows direct interface to a wide variety

of microcontrollers and DSPs, as shown in Figure 35.

AD5380 to MC68HC11

The serial peripheral interface (SPI) on the MC68HC11 is

configured for Master mode (MSTR = 1), Clock Polarity bit

(CPOL) = 0, and the Clock Phase bit (CPHA) = 1. The SPI is

configured by writing to the SPI control register (SPCR)—see

the 68HC11 User Manual. SCK of the 68HC11 drives the SCLK

of the AD5380, the MOSI output drives the serial data line

(DIN) of the AD5380, and the MISO input is driven from SDO.

The SYNC signal is derived from a port line (PC7). When data

is being transmitted to the AD5380, the SYNC line is taken low

(PC7). Data appearing on the MOSI output is valid on the

falling edge of SCK. Serial data from the 68HC11 is transmitted

in 8-bit bytes with only eight falling clock edges occurring in

the transmit cycle.

Figure 34. AD5380-to-MC68HC11 Interface

Figure 35. AD5380-to-Parallel Interface

MC68HC11

AD5380

MISO

MOSI

SCK

PC7

SDO

RESET

SER/PAR

DIN

SCLK

SYNC

SPI/I2C

DVDD

µCONTROLLER/

DSP PROCESSOR1

AD5380

ADDRESS

DECODE

UPPER BITS OF

ADDRESS BUS

DATA

BUS

D15

R/W

REG1

REG0

D13

LDAC

1ADDITIONAL PINS OMITTED FOR CLARITY.

Rev. D | Page 32 of 40

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