AD7934 datasheet(22/32 Pages) AD

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AD7933/AD7934

Rev. B | Page 22 of 32

starts the sequence again. The WR input must be kept high to

ensure that the control register is not accidentally overwritten

and the sequence interrupted. This pattern continues until the

AD7933/AD7934 is written to. Figure 31 shows the flowchart of

the consecutive sequence mode.

POWER ON

WRITE TO THE CONTROL REGISTER TO

SET UP OPERATING MODE, ANALOG INPUT

AND OUTPUT CONFIGURATION SELECT

FINAL CHANNEL (ADD1 AND ADD0) IN

CONSECUTIVE SEQUENCE.

SET SEQ0 = 1 SEQ1 = 1.

CONTINUOUSLY CONVERT ON A CONSECUTIVE

SEQUENCE OF CHANNELS FROM CHANNEL 0

UP TO AND INCLUDING THE PREVIOUSLY

SELECTED FINAL CHANNEL ON ADD1 AND ADD0

WITH EACH CONVST PULSE.

Figure 31. Consecutive Sequence Mode Flow Chart

REFERENCE

The AD7933/AD7934 can operate with either the on-chip

reference or an external reference. The internal reference is

selected by setting the REF bit in the internal control register to 1.

A block diagram of the internal reference circuitry is shown in

Figure 32. The internal reference circuitry includes an on-chip

2.5 V band gap reference and a reference buffer. When using the

internal reference, decouple the VREFIN/VREFOUT pin to AGND with a

0.47 μF capacitor. This internal reference not only provides the

reference for the analog-to-digital conversion, but it can also be

used externally in the system. It is recommended that the

reference output is buffered using an external precision op amp

before applying it anywhere in the system.

REFERENCE

AD7933/

AD7934

ADC

BUFFER

VREFIN/

VREFOUT

Figure 32. Internal Reference Circuit Block Diagram

Alternatively, an external reference can be applied to the

VREFIN/VREFOUT pin of the AD7933/AD7934. An external

reference input is selected by setting the REF bit in the internal

control register to 0. The external reference input range is 0.1 V

to VDD. It is important to ensure that, when choosing the

reference value, the maximum analog input range (VIN MAX) is

never greater than VDD + 0.3 V to comply with the maximum

ratings of the device. For example, if operating in differential

mode and the reference is sourced from VDD, the 0 V to 2 × VREF

range cannot be used. This is because the analog input signal

range now extends to 2 × VDD, which exceeds the maximum

rating conditions. In the pseudo differential modes, the user

must ensure that VREF + VIN− ≤ VDD when using the 0 V to VREF

range, or when using the 2 × VREF range that 2 × VREF + VIN− ≤ VDD.

In all cases, the specified reference is 2.5 V.

The performance of the part with different reference values is

shown in Figure 9 to Figure 11. The value of the reference sets

the analog input span and the common-mode voltage range.

Errors in the reference source result in gain errors in the

AD7933/AD7934 transfer function and add to the specified

full-scale errors on the part.

Table 12 lists suitable voltage references available from Analog

Devices that can be used. Figure 33 shows a typical connection

diagram for an external reference.

Table 12. Examples of Suitable Voltage References

Reference

Output

Voltage (V)

Initial Accuracy

(% maximum)

Operating

Current (μA)

AD780

2.5/3

0.04

1000

ADR421

2.5

0.04

500

ADR420

2.048

0.05

500

AD780

+VIN

GND

TEMP

O/P SELECT

TRIM

VOUT

VREF

2.5V

VDD

NC = NO CONNECT

10nF

0.1µF

*ADDITIONAL PINS OMITTED FOR CLARITY.

AD7933/

AD7934*

Figure 33. Typical VREF Connection Diagram

Digital Inputs

The digital inputs applied to the AD7933/AD7934 are not

limited by the maximum ratings that limit the analog inputs.

Instead, the digital inputs applied can go to 7 V and are not

restricted by the VDD + 0.3 V limit that is on the analog inputs.

Another advantage of the digital inputs not being restricted by

the VDD + 0.3 V limit is the fact that power supply sequencing

issues are avoided. If any of these inputs are applied before VDD,

there is no risk of latch-up as there would be on the analog inputs

if a signal greater than 0.3 V was applied prior to VDD.

VDRIVE Input

The AD7933/AD7934 have a VDRIVE feature. VDRIVE controls the

voltage at which the parallel interface operates. VDRIVE allows the

ADC to easily interface to 3 V and 5 V processors.

For example, if the AD7933/AD7934 are operated with a VDD

of 5 V, and the VDRIVE pin is powered from a 3 V supply, the

AD7933/AD7934 have better dynamic performance with a

VDD of 5 V while still being able to interface to 3 V processors.

Ensure that VDRIVE does not exceed VDD by more than 0.3 V (see

the Absolute Maximum Ratings section).

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