AD8302 datasheet(15/24 Pages) AD

15 / 24 page

REV. A

AD8302

–15–

GENERAL DESCRIPTION AND THEORY

The AD8302 measures the magnitude ratio, defined here as

gain, and phase difference between two signals. A pair of

matched logarithmic amplifiers provide the measurement, and

their hard-limited outputs drive the phase detector.

Basic Theory

Logarithmic amplifiers (log amps) provide a logarithmic com-

pression function that converts a large range of input signal

levels to a compact decibel-scaled output. The general math-

ematical form is:

OUT

SLP

()

log

(1)

where VIN is the input voltage, VZ is called the intercept (voltage),

and VSLP is called the slope (voltage). It is assumed throughout

that log(x) represents the log10(x) function. VSLP is thus the

volts/decade, and since a decade of voltage corresponds to

20 dB, VSLP/20 is the volts/dB. VZ is the value of input

signal that results in an output of zero and need not correspond

to a physically realizable part of the log amp signal range.

While the slope is fundamentally a characteristic of the log amp,

the intercept is a function of the input waveform as well.

Furthermore, the intercept is typically more sensitive to tem-

perature and frequency than the slope. When single log amps

are used for power measurement, this variability introduces

errors into the absolute accuracy of the measurement since the

intercept represents a reference level.

The AD8302 takes the difference in the output of two identical

log amps, each driven by signals of similar waveforms but at

different levels. Since subtraction in the logarithmic domain

corresponds to a ratio in the linear domain, the resulting

output becomes:

MAG

SLP

INA

INB

()

log

(2)

where VINA and VINB are the input voltages, VMAG is the output

corresponding to the magnitude of the signal level difference,

and VSLP is the slope. Note that the intercept, VZ, has dropped

out. Unlike the measurement of power, when measuring a dimen-

sionless quantity such as relative signal level, no independent

reference or intercept need be invoked. In essence, one signal

serves as the intercept for the other. Variations in intercept due

to frequency, process, temperature, and supply voltage affect both

channels identically and hence do not affect the difference. This

technique depends on the two log amps being well matched

in slope and intercept to ensure cancellation. This is the case

for an integrated pair of log amps. Note that if the two signals

have different waveforms (e.g., different peak-to-average ratios)

or different frequencies, an intercept difference may appear, intro-

ducing a systematic offset.

The log amp structure consists of a cascade of linear/limiting

gain stages with demodulating detectors. Further details about

the structure and function of log amps can be found in data

sheets for other log amps produced by Analog Devices.

2 The

output of the final stage of a log amp is a fully limited signal

over most of the input dynamic range. The limited outputs from

both log amps drive an exclusive-OR style digital phase detector.

Operating strictly on the relative zero-crossings of the limited sig-

nals, the extracted phase difference is independent of the original

input signal levels. The phase output has the general form:

PHS

INA

INB

()− ()

[]

Φ ΦΦ

(3)

where VΦ is the phase slope in mV/degree and Φ is each signal’s

relative phase in degrees.

Structure

The general form of the AD8302 is shown in Figure 2. The

major blocks consist of two demodulating log amps, a phase

detector, output amplifiers, a biasing cell, and an output refer-

ence voltage buffer. The log amps and phase detector process

the high frequency signals and deliver the gain and phase infor-

mation in current form to the output amplifiers. The output

amplifiers determine the final gain and phase scaling. External

filter capacitors set the averaging time constants for the respec-

tive outputs. The reference buffer provides a 1.80 V reference

voltage that tracks the internal scaling constants.

MFLT

VMAG

MSET

PSET

VPHS

PFLT

VREF

VIDEO OUTPUT – A

INPA

OFSA

COMM

OFSB

INPB

VPOS

–

60dB LOG AMPS

(7 DETECTORS)

60dB LOG AMPS

(7 DETECTORS)

VIDEO OUTPUT – B

PHASE

DETECTOR

–

BIAS

1.8V

Figure 2. General Structure

Each log amp consists of a cascade of six 10 dB gain stages with

seven associated detectors. The individual gain stages have 3 dB

bandwidths in excess of 5 GHz. The signal path is fully differen-

tial to minimize the effect of common-mode signals and noise.

Since there is a total of 60 dB of cascaded gain, slight dc offsets

can cause limiting of the latter stages, which may cause mea-

surement errors for small signals. This is corrected by a feedback

loop. The nominal high-pass corner frequency, fHP, of this loop

is set internally at 200 MHz but can be lowered by adding external

capacitance to the OFSA and OFSB pins. Signals at frequencies

well below the high-pass corner are indistinguishable from dc

offsets and are also nulled. The difference in the log amp out-

puts is performed in the current domain, yielding by analogy to

Equation 2:

SLP

INA

INB

()

log

(4)

where ILA and ISLP are the output current difference and the

characteristic slope (current) of the log amps, respectively. The

slope is derived from an accurate reference designed to be insen-

sitive to temperature and supply voltage.

The phase detector uses a fully symmetric structure with respect

to its two inputs to maintain balanced delays along both signal

paths. Fully differential signaling again minimizes the sensitivity

to common-mode perturbations. The current-mode equivalent

to Equation 3 is:

INA

INB

()− ()−°

[]

Φ ΦΦ

(5)

where IPD and IΦ are the output current and characteristic slope

associated with the phase detector, respectively. The slope is

derived from the same reference as the log amp slope.

NOTES

1See the data sheet for the AD640 for a description of the effect of waveform on

the intercept of log amps.

2For example, see the data sheet for the AD8307.

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