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70353C Datasheet(PDF) 44 Page - Microchip Technology |
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70353C Datasheet(HTML) 44 Page - Microchip Technology |
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44 / 76 page  dsPIC33E/PIC24E Family Reference Manual DS70353C-page 21-44 © 2008-2011 Microchip Technology Inc. 21.7.1.1 ACCEPTANCE FILTERS Figure 21-11 illustrates the incoming message identifier being compared with the filter/mask bits for standard frames. Figure 21-12 illustrates the incoming message identifier being compared with the filter/mask bits for extended frames. Figure 21-11: Acceptance Filtering for a Standard Message Figure 21-12: Acceptance Filtering for a Extended Message The acceptance filters 0-15 can be individually enabled or disabled using the Enable Filter bits (FLTENn) in the ECAN Acceptance Filter Enable register (CiFEN1<15:0>). The value of ‘n’ signifies the register bit and corresponds to the index of the acceptance filter. The acceptance filters 0-15 specify the identifiers that must be contained in an incoming message for its contents to be passed to a receive buffer. Each of these filters consists of two registers – one for the SIDs and the other for EIDs. These registers are identified as: • CiRXFnSID: ECAN Acceptance Filter Standard Identifier Register n (n = 0-15) • CiRXFnEID: ECAN Acceptance Filter Extended Identifier Register n (n = 0-15) SID10 SID9 S O F IDENTIFIER 11 Bits R T R I D E DLC 4 Bits CRC 16 B its ACK 2 Bits EOF 7 Bits IFS 3 Bits SID1 11-bit Identifier RB0 DATA 8 Bits SID0 SID10 SID9 SID1 SID0 EXIDE CiRXFnSID CiRXMnSID SID10 SID9 SID1 SID0 MIDE Accept/Reject Message SID10 SID1 S O F IDENTIFIER 11 Bits S R R I D E R T R DLC 4 Bits CRC 16 Bits ACK EOF 7 Bits IFS 3 Bits SID0 - 29-bit Identifier IDENTIFIER 18 Bits EID17 EID1 EID0 R B 1 R B 0 CiRXMnSID CiRXFnSID EID15 EID14 EID0 CiRXMnEID SID10 SID0 EXIDE EID17 EID16 SID10 SID0 MIDE EID17 EID16 EID14 EID0 EID15 CiRXFnEID Accept/Reject Message 2 Bits |
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