SSM2166 datasheet(13/20 Pages) AD

13 / 20 page

Data Sheet

SSM2166

Rev. E | Page 13 of 20

EVALUATION BOARD

A schematic diagram of the SSM2166 evaluation board is

illustrated in Figure 26. As a design aid, the layouts for the

topside silkscreen and the topside and backside metallization

layers are shown in Figure 27, Figure 28, and Figure 29. Although

not shown to scale, the finished dimension of the evaluation

board is 3.5 inches by 3.5 inches and comes complete with pin

sockets and a sample of the SSM2166.

Signal sources are connected to the SSM2166 through a 1/8-inch

phone jack where a 0.1 µF capacitor couples the input signal

to the AUDIO +IN pin (Pin 7). As shown in Figure 26 and in

microphone applications, the phone jack shield can be optionally

connected to the ground plane of the board (Jumper J1 inserted

into the board socket for Pin 1 and Pin 2) or to the VCAR input

at Pin 4 (J1 inserted into the board socket for Pin 1 and Pin 3).

If the signal source is a waveform or function generator, the

phone jack shield should be connected to ground.

For ease in making adjustments for all configuration parameters,

single-turn potentiometers are used throughout. Optional Jumper

J2 connects the COMP RATIO SET pin to ground and sets the

SSM2166 for no compression (that is, compression ratio = 1:1).

Optional Jumper J3 connects the POWER DOWN (Pin 12) input

to ground for normal operation. J3 can be replaced by an open-

drain logic buffer for a digitally controlled shutdown function.

An output signal mute function can be implemented on the

SSM2166 by connecting the GAIN ADJUST pin (Pin 2) through a

330 Ω resistance to ground. This is provided on the evaluation

board via R11 and S1. Capacitor C5, connected between Pin 2

and ground and provided on the evaluation board, can be used

to avoid audible clicks when using the mute function.

To configure the SSM2166 input buffer for gain, provisions for

R1, R2, and C2 have been included. To configure the input buffer

for unity-gain operation, R1 and R2 are removed and a direct

connection is made between the −IN pin (Pin 6) and the BUF OUT

pin (Pin 5).

The output stage of the SSM2166 is capable of driving >1 V rms

(3 V p-p) into >5 kΩ loads and is externally available through

an RCA phono jack provided on the board. If the output of the

SSM2166 is required to drive a lower load resistance or an audio

cable, the on-board OP113 can be used. To use the OP113 buffer,

insert Jumper J4 into the board socket for Pin 4 and Pin 5 and

insert Jumper J5 into the board socket for Pin 6 and Pin 7. If the

output buffer is not required, remove Jumper J5 and insert Jumper

J4 into board socket Pin 5 and Pin 7.

There are no blocking capacitors either on the input or at

the output of the buffer. As a result, the output dc level of the

buffer matches the output dc level of the SSM2166, which is

approximately 2.3 V. A dc blocking capacitor can be inserted at

Pin 6 and Pin 7. An evaluation board and setup procedure

is available from an Analog Devices, Inc., sales representative.

SSM2166

COMP

RATIO

ADJ

100kΩ

OUTPUT

JACK

RCA

PHONO

OP113

1kΩ

R11

330Ω

R10

20kΩ

GAIN

ADJ

MUTE

SWITCH

0.01µF

22µF

10µF

0.1µF

INPUT

JACK

1/8"

PHONE

MIC

PWR

1µF

10kΩ

10µF

0.1µF

10kΩ

50kΩ

1MΩ

500Ω

CCW

ROTATION

PT ADJ

R12

100kΩ

NOISE GATE ADJ

POWER DOWN

NOISE GATE

SET

V+

ROTATION

SET

VCAIN

BUF OUT

AVG CAP

AUDIO +IN

GAIN ADJUST

COMP RATIO SET

–IN

VCAR

OUTPUT

GND

Figure 26. Evaluation Board Schematic

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