UPC8101 datasheet(5/28 Pages) NEC

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Data Sheet P11074EJ3V0DS00

µµµµPC8110GR

PIN EXPLANATION

No.

ASSIGNMENT

SUPPLY

VOL. (V)

FUNCTION AND APPLICATION

EQUIVALENT CIRCUIT

1LOin



2.6

LO input for phase shifter.

Connect around 50

Ω between 1

and 3 pin to match to 50

Ω.

GND

(for Local

Amp. Block)



Connect to the ground with

minimum inductance.

Track length should be kept as

short as possible.

3LOin



2.6

Bypass of LO input.

This pin is grounded through

around 33 pF capacitor.

VCC/2



Input for Q signal.

This input impedance is 150 k

Ω.

In case of that I/Q input signals

are single ended, amplitude of

the signal is 500 mVp-p max.

Note 2

VCC/2



Input for Q signal.

This input impedance is 150 k

Ω.

In case of that I/Q input signals

are single ended, VCC/2 biased

DC signal should be input.

In case of that I/Q input signals

are differential, amplitude of the

signal is 250 mVp-p max. Note 2

VCC/2



Input for I signal.

This input impedance is 150 k

Ω.

In case of that I/Q input signals

are single ended, VCC/2 biased

DC signal should be input.

In case of that I/Q input signals

are differential, amplitude of the

signal is 250 mVp-p max. Note 2

VCC/2



Input for I signal.

This input impedance is 150 k

Ω.

In case of that I/Q input signals

are single ended, amplitude of

the signal is 500 mVp-p max.

Note 2

GND

(for Quadrature

Modulator Block)



Connect to the ground with

minimum inductance.

Track length should be kept as

short as possible.



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