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Test results and significant waveforms

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is latched as long as the supply voltage of the IC is above the UVLO threshold. At the same

time the pin PWM_LATCH (pin #8) is asserted high. PWM_LATCH is an open source output

able to deliver 3.7 V min. with 0.5 mA load, intended for tripping a latched shutdown function

of the PWM controller IC in the cascaded DC-DC converter, so that the entire unit is latched

off. To restart the system, it is necessary to recycle the input power, so that the Vcc voltages

of both the L6563 and the PWM controller go below their respective UVLO thresholds.

The PFC_OK pin doubles its function as a not-latched IC disable. A voltage below 0.2 V

shuts down the IC, reducing its consumption below 1 mA. In this case both PWM_STOP and

PWM_LATCH keep their high impedance status. To restart the IC simply let the voltage at

the pin go above 0.26 V.

Note that this function offers a complete protection against not only feedback loop failures or

erroneous settings, but also against a failure of the protection itself. Either resistor of the

PFC_OK divider failing short or open (or the PFC_OK (#7) pin is floating) results in shutting

down the L6563 and stopping the pre-regulator.

The event of an open loop is shown in Figure 31. The protection intervention stops the

operation of the L6563 and the activation of the PWM_LATCH pin.

2.7

Power management/housekeeping functions

A special feature of the L6563 is that it facilitates the implementation of the "housekeeping"

circuitry needed to coordinate the operation of the PFC stage to that of the cascaded DCDC

converter. The housekeeping circuitry functions ensure that transient conditions like power-

up or power down sequencing or failures of power stage are properly handled. The L6563

provides some pins for these functions.

One communication line between the L6563 and the PWM controller of the cascaded DC-

DC converter is the PWM_LATCH pin (#8), which is normally open when the PFC works

properly. It goes high if the L6563 loses control of the output voltage (because of a failure of

the control loop) or if the boost inductor saturates. Its aim is to latch off the PWM controller

from the cascaded DC-DC converter as well. A second communication line can be

established via the disable function included in the RUN pin. Typically, this line is used to

allow the PWM controller of the cascaded DC-DC converter to shut down the L6563 in case

of light load, in order to minimize the no-load input consumption of the power supply.

Figure 32.

L6563 On/Off control by a cascaded converter controller via PFC_OK or

RUN pin

L6668

PFC_STOP

14

16

Vcc

10 k

Ω

BC557

2.2 k

Ω

L6563

L6563A

Vcc

14

8.2 V

L6563

L6563A

(RUN)

PFC_OK

BC547

L6668

14 PFC_STOP

7

(10)

2.2 k

Ω

8

VREF

100 k

Ω

L6599

PFC_STOP

14

L6563

L6563A

(RUN)

PFC_OK

7

(10)