Circuit descriptions

AN2487

12/32

Two methods of determining the classification are supported:

●

Voltage between -15.5 and -20 V is applied and the current is measured (IEEE803.2af

compliant); or,

●

Current is applied and voltage measured (obsolete, requires multiple test currents).

The STHS4257 supports both methods -- it acts as a current sink. If voltage is applied and

current measured, the classification is determined in a single step.

If a current between the classification ranges is applied, the voltage across the device will be

either less than 15.5 V or greater than 20 V. Stepping the current between ranges allows

determining the classification.

Because of the relatively high dissipation in the chip at the higher classes, the classification

time is specified by IEEE 802.3af at 75 ms (maximum).

3.2.4

Startup sequence

If the signature (and classification, if implemented) tests indicate that power should be

applied to the PD, the PSE will apply the available voltage to the ethernet cable with the

current limited to 400 mA. (If the source is in current limit for more than 50ms, the load is

disconnected.) This allows charging of the power converter input capacitors.

Action of the PD is then determined by the voltage at the STHS4257 input and the state of

its internal current limiter.

If the input voltage to the STHS4257 is below 30 V, nothing happens; no current is supplied

to the power converter.

If the input voltage is above 42 V, the STHS4257 turns on, supplying current-limited power to

the power converter input.

The power converter requires capacitance at its input, usually in the range from 50 to

300 µF. This capacitance (C2, 3, and 4) is charged to the input voltage by the internal

current limiter of the STHS4257.

When the capacitor charging current falls to a predetermined value, the capacitor is

assumed to be charged. At this point, input and output voltages of the STHS4257 are nearly

equal, and the current limit function is replaced by a low-resistance switch.

This signal is used to start the power converter.

Two events can stop the STHS4257 startup: overtemperature and undervoltage. If either

event occurs, the /Power Good signal goes high impedance (open circuit), and the FET

If neither event occurs, the /Power Good signal turns on Q2, which enables current to trickle

through R5 to charge C7 in the housekeeping supply of the power converter. Approximately

40 milliseconds later, C7 is charged to the L6565's startup voltage and the converter starts.

3.2.5

Maintain power signature (MPS)

The converter must maintain two signatures if the PSE is to continue supplying power:

●

DC MPS - Current of at least 10 mAdc drawn from the PSE for 60 ms out of any 360 ms

period. Dropouts cannot exceed 300 ms.

●

AC MPS - Impedance less than 27 K at 500 Hz, >2.5 V test signal

The PSE can optionally ignore either the DC or AC MPS. The PD must present both.