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LTC1266CS Datasheet(PDF) 11 Page - Linear Technology |
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LTC1266CS Datasheet(HTML) 11 Page - Linear Technology |
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11 / 20 page ![]() 11 LTC1266 LTC1266-3.3/LTC1266-5 APPLICATIO S I FOR ATIO From the duty cycles, the required RDS(ON) for each MOSFET can be derived: TS RDS(ON) = VIN × PT VOUT × IMAX2 × (1 + δT) BS RDS(ON) = VIN × PB (VIN – VOUT) × IMAX2 × (1 + δB) where PT and PB are the allowable power dissipations and δTandδBarethetemperaturedependenciesofRDS(ON).PT and PB will be determined by efficiency and/or thermal requirements(seeEfficiencyConsiderations).ForaMOSFET, (1 + δ) is generally given in the form of a normalized RDS(ON) vs temperature curve, but δPCH = 0.007/°C and δNCH = 0.005/°C can be used as an approximation for low voltage MOSFETs. The minimum input voltage determines whether standard threshold or logic-level threshold MOSFETs must be used. For VIN > 8V, standard threshold MOSFETs (VGS(TH) < 4V) may be used. If VIN is expected to drop below 8V, logic- level threshold MOSFETs (VGS(TH) < 2.5V) are strongly recommended. The LTC1266 series Power VIN must al- ways be less than the absolute maximum VGS ratings for the MOSFETs. The Schottky diode D1 shown in Figure 1 only conducts during the deadtime between the conduction of the two power MOSFETs. D1’s sole purpose in life is to prevent the body diode of the bottom-side MOSFET from turning on and storing charge during the deadtime, which could cost as much as 1% in efficiency (although there are no other harmful effects if D1 is omitted). Therefore, D1 should be selected for a forward voltage of less than 0.7V when conducting IMAX. CIN and COUT Selection In continuous mode, the current through the topside MOSFET is a square wave of duty cycle VOUT/VIN. To prevent large voltage transients, a low ESR (Effective Series Resistance) input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: CIN Required IRMS ≈ IMAX [VOUT(VIN – VOUT)]1/2 VIN This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is com- monly used for design because even significant devia- tions do not offer much relief. Note that capacitor manufacturer’s ripple current ratings are often based on only 2000 hours of life. This makes it advisable to further derate the capacitor, or to choose a capacitor rated at a higher temperature than required. Always consult the manufacturer if there is any question. An additional 0.1 µF to 1 µF ceramic capacitor is also required on Power VIN (Pin 2) for high frequency decoupling. The selection of COUT is driven by the required ESR. The ESR of COUT must be less than twice the value of RSENSE for proper operation of the LTC1266 series: COUT Required ESR < 2RSENSE Optimum efficiency is obtained by making the ESR equal to RSENSE. As the ESR is increased up to 2RSENSE, the efficiency degrades by less than 1%. If the ESR is greater than 2RSENSE, the voltage ripple on the output capacitor will prematurely trigger Burst Modeoperation, resulting in disruption of continuous mode and an efficiency hit which can be several percent. If Burst Mode operation is dis- abled, the ESR requirement can be relaxed and is limited only by the allowable output voltage ripple. Manufacturers such as Nichicon and United Chemicon should be considered for high performance capacitors. The OS-CON semiconductor dielectric capacitor available from Sanyo has the lowest ESR/size ratio of any aluminum electrolytic at a somewhat higher price. Once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. In surface mount applications multiple capacitors may have to be paralleled to meet the capacitance, ESR or RMS current handling requirements of the application. An excellent choice is the AVX TPS series of surface mount tantalums. At low supply voltages, a minimum capacitance at COUT is needed to prevent an abnormal low frequency oper- ating mode (see Figure 4). When COUT is made too small, the output ripple at low frequencies will be large enough to trip the voltage comparator. This causes Burst Modeoperation to be activated when the LTC1266 |
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