LTC2123 datasheet(18/50 Pages) LINER

18 / 50 page

LTC2123

2123fb

For more information www.linear.com/LTC2123

Frame Alignment Monitoring (FAM)

After initial frame synchronization has been established,

frame alignment monitoring enables the receiver to verify

that code-group alignment is maintained without the loss

of data. This is done by substituting a K28.7 comma for the

last code-group of the frame when certain conditions are

met. The receiver uses this comma as a position marker

within the frame for alignment verification. After decoding

the data, the receiver replaces the K28.7 comma with the

original data.

Initial Frame Synchronization

The process of communicating frame boundary informa-

tion to the receiver for alignment purposes. The receiver

asserts the SYNC~ signal, causing the ADC to transmit

K28.5 commas to the receiver. The receiver de-asserts the

SYNC~ signal, and the ADC ceases transmission of com-

mas according to the rules of the particular sub-class and

mode of operation. The point of termination of commas

in the data stream marks the frame boundary.

Lane Alignment Monitoring (LAM)

In JESD204B, lane alignment is attained and monitored

through the use of the 8B/10B K28.3 special characters.

These characters are conditionally embedded in the data

stream at the end of the multiframe. The receiver uses this

character as a position marker within the multiframe for

lane alignment verification. After decoding the data, the

receiverreplacestheK28.3characterwiththeoriginaldata.

Local Multiframe Clock (LMFC)

AninternalclockwithineachdeviceofaJESD204Bsystem

that marks the multiframe boundary.

Multiframe

A group of frames intended to be of long duration com-

pared to lane mismatches in multiple lane systems. In

JESD204B the maximum multiframe length is 32 frames.

There is no external multiframe clock in a JESD204B sys-

tem, so the signal marking the multiframe boundaries is

referred to as the local multiframe clock (LMFC).

DEFINITIONS

Octet

The 8-bit input to an 8B/10B encoder, or the 8-bit output

from an 8B/10B decoder.

Run-Length Limited (RLL)

Data that has been encoded for the purpose of limiting

the number of consecutive 1’s or 0’s in a data stream.

This process guarantees that there will be an adequate

number of transitions in the serial data for the receiver to

lock onto with a phase-locked loop and recover the high

speed clock.

Running Disparity

InordertomaintainDCbalancemost8B/10Bcode-groups

have two output possibilities for each input octet. The run-

ning disparity is calculated to determine which of the two

code-groupsshouldbetransmittedtomaintainDCbalance.

The disparity of a code-group is analyzed in two segments

called sub-blocks. Sub-block1 consists of the first six bits

of a code-group and sub-block2 consists of the last four

bits of a code-group. When a sub-block is more heavily

weightedwith1’stherunningdisparityispositive,andwhen

it is more heavily weighted with 0’s the running disparity

is negative. When the number of 1’s and 0’s are equal in

a sub-block, the running disparity remains unchanged.

The polarity of the current running disparity determines

which code-group should be transmitted to maintain DC

balance.Foracompletedescriptionofdisparityrules,refer

to IEEE Std 802.3-2002 part 3, Clause 36.2.4.4.

Pseudo Random Bit Sequence (PRBS)

A data sequence having a random nature over a finite inter-

val. The most commonly used PRBS test patterns may be

describedbyapolynomialintheformof1+xm+xnandhave

a random nature for the length of up to 2n-1 bits, where n

indicates the order of the PRBS polynomial and m plays

a role in maximizing the length of the random sequence.

Scrambler

A logic block that applies a pseudo random bit sequence

to the input octets to minimize the tonal content of the

high speed serial bit stream.

LTC2123 Datasheet(PDF) 18 Page - Linear Technology

LTC2123 Datasheet(HTML) 18 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

Datasheet Download

Link URL