LT8705MPFE#PBF datasheet(29/44 Pages) LINER

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LT8705

8705fe

For more information www.linear.com/LT8705

applicaTions inForMaTion

Input Voltage Regulation or Undervoltage Lockout

By connecting a resistor divider between VIN, FBIN and

GND, the FBIN pin provides a means to regulate the input

voltage or to create an undervoltage lockout function.

Referring to error amplifier EA3 in the Block Diagram,

when FBIN is lower than the 1.205V reference VC is pulled

low. For example, if VIN is provided by a relatively high

impedancesource(i.e.,asolarpanel)andthecurrentdraw

pulls VIN below a preset limit, VC will be reduced, thus

reducing current draw from the input supply and limiting

the voltage drop. Note that using this function in forced

continuous mode (MODE pin low) can result in current

being drawn from the output and forced into the input.

If this behavior is not desired then use discontinuous or

Burst Mode operation.

To set the minimum or regulated input voltage use:

VIN(MIN) =1.205V • 1+

RFBIN1

RFBIN2

⎛

⎝

⎜

⎞

⎠

⎟

where RFBIN1 and RFBIN2 are shown in Figure 1. Make

sure to select RFBIN1 and RFBIN2 such that FBIN doesn’t

exceed 30V (absolute maximum rating) under maximum

VIN conditions.

This same technique can be used to create an undervolt-

age lockout if the LT8705 is NOT in forced continuous

mode. When in Burst Mode operation or discontinuous

mode, forcing VC low will stop all switching activity. Note

that this does not reset the soft-start function, therefore

resumption of switching activity will not be accompanied

by a soft-start.

to VIN. Tie both pins to VIN if they are not being used.

Also, CSPOUT and CSNOUT should always be tied to a

potential close to VOUT, or be tied directly to VOUT if not

being used.

Boost Diodes DB1 and DB2: Although Schottky diodes

have the benefit of low forward voltage drops, they can

exhibit high reverse current leakage and have the potential

for thermal runaway under high voltage and temperature

conditions. Silicon diodes are thus recommended for

diodes DB1 and DB2. Make sure that DB1 and DB2 have

reverse breakdown voltage ratings higher than VIN(MAX)

and VOUT(MAX) and have less than 1mA of reverse leakage

current at the maximum operating junction temperature.

Make sure that the reverse leakage current at high op-

erating temperatures and voltages won’t cause thermal

runaway of the diode.

In some cases it is recommended that up to 5Ω of resis-

tance is placed in series with DB1 and DB2. The resistors

reduce surge currents in the diodes and can reduce ring-

ing at the SW and BOOST pins of the IC. Since SW pin

ringing is highly dependent on PCB layout, SW pin edge

rates and the type of diodes used, careful measurements

directly at the SW pins of the IC are recommended. If

required, a single resistor can be placed between GAT-

EVCC and the common anodes of DB1 and DB2 (as in the

front page application) or by placing separate resistors

between the cathodes of each diode and the respective

BOOST pins. Excessive resistance in series with DB1

and DB2 can reduce the BOOST-SW capacitor voltage

when the M2 or M3 on-times are very short and should

be avoided.

Output Voltage

The LT8705 output voltage is set by an external feedback

resistive divider carefully placed across the output capaci-

tor. The resultant feedback signal (FBOUT) is compared

with the internal precision voltage reference (typically

1.207V) by the error amplifier EA4. The output voltage is

given by the equation:

VOUT =1.207V • 1+

RFBOUT1

RFBOUT2

⎛

⎝

⎜

⎞

⎠

⎟

where RFBOUT1 and RFBOUT2 are shown in Figure 1.

LT8705MPFE#PBF Datasheet(PDF) 29 Page - Linear Technology

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