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IR36021 Datasheet(PDF) 27 Page - International Rectifier |
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IR36021 Datasheet(HTML) 27 Page - International Rectifier |
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27 / 41 page ![]() IR36021 DIGITAL POL BUCK CONTROLLER with I2C AND PMBus Interface February 27, 2013 | Rev 3.5 27 In PS2 mode (Constant‐On‐Time Mode), internal circuitry determines when the inductor current declines to zero on a cycle by cycle basis and shuts off the low‐side MOSFET at the appropriate time in each cycle (Figure 32). This reduces conduction losses and also lowers the switching frequency resulting in improved efficiency because the inductor and low‐side MOSFET are not sinking power from the output capacitors at light loads. When diode‐emulation is activated if phase‐1b is active (i.e. phase‐shedding is not active), PWM‐1b becomes tri‐ state and phase‐1a goes into constant‐on‐time mode simultaneously. In diode‐emulation mode, if Vout drops below a certain threshold (le_th) due to applying a load, the operation is switched to PWM instantly. Industry standard tri‐state drivers typically have slow tri‐ state entry times, typically which allows negative current to build up reducing efficiency and causing ringing. The off_time_adjust variable allows the designer to compensate for the tri‐state delay by reducing the low‐side FET on‐time by an equivalent amount. Figure 32: PS2 Active Diode Emulation Mode FAULTS & PROTECTION The comprehensive fault coverage of the IR36021 protects the VR against a variety of fault conditions. Faults are user configurable through the GUI which also displays the fault status. There are two types of fault monitoring registers. In addition to real‐time fault registers, there are “sticky” fault registers that can only be cleared with an I2C command or 3.3V power cycle. These will indicate if any fault has occurred since the last power cycle, even if the fault has cleared itself and the VR has resumed normal operation. Table 12 lists the available faults. TABLE 12: STICKY & NON‐STICKY FAULTS Register Type Faults Sticky OTP, OCP, OVP, UVP, VIN UVLO, 3.3V UVLO, phase‐fault, slow‐OCP Non‐Sticky The controller has two programmable modes for determining how the controller responds to faults on the two loops. In combined mode, an over‐current or under‐ voltage fault on either loop will trigger the programmed response on both loops (Figure 35). In individual mode, a loop will respond only to its own over‐current or under‐ voltage fault independent from the other loop. Input under‐voltage on 3.3V or VIN supplies, over‐voltage on either loop or an over‐temperature fault on controllers with single temperature sense will always shut down both loops. Output Over‐voltage Protection (OVP) If the output voltage exceeds a user‐programmable threshold (Table 15) above the set‐point, the IR36021 detects an output over‐voltage fault and latches on the low‐side MOSFETS to limit the output voltage rise based on the settings in Table 13. TABLE 13: OVP ACTION OVP Action Low‐side MOSFET latched on Low‐side MOSFET on until Output<0.248V Under OVP conditions, the low‐side MOSFETs can be configured to remain latched indefinitely (Figure 33) or remain latched on until the output voltage falls below the threshold at which time the low‐side MOSFETs are released (Figure 34). This release mode can reduce or prevent undershoot of the output voltage. In the release mode, if the output voltage rises above the OVP level the low side MOSFET’s will again be turned on until Vout drops below the release threshold level. During soft‐start, OVP is triggered at the fixed soft‐start level. This level can be chosen from three different values of 1.275V, 1.2V or 1.35V. Optionally, the OVP may be allowed to remain active while the IR36021 is disabled to prevent system leakage from over‐voltaging the output (Table 14). VOUT1 Measured voltage representing I_inductor_phase-1a PWM-1a Programmed on-time Calculated low- side FET on-time Zero-crossing prediction at the correct time |
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