IR36021 datasheet(33/41 Pages) IRF

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IR36021

DIGITAL POL BUCK CONTROLLER with I2C AND PMBus

Interface

February 27, 2013 | Rev 3.5

TABLE 29: WRITE SECURITY ZONES

Zone

Access when

Locked

Unlocked

Open

All

Configuration

Control &

Telemetry

All

Secure

None

All

TABLE 30: READ OR WRITE UNLOCK OPTIONS

Password Only

Pin Only

Pin & Password

Lock Forever

Password Protection

The system designer can set any 16‐bit password (other

than 00h) and this is stored in MTP (Table 31). To unlock, a

user must write the correct password into the “Password

Try” register which is a volatile read/write register. To lock,

write an incorrect password into the “Password Try”

will lock up to prevent unauthorized access.

TABLE 31: PASSWORD REGISTERS

Length

Location

Password

16 bit (2 bytes)

MTP

Try

16 bit (2 bytes)

R/W

The following pseudo‐code illustrates how to change

a password:

# first unlock the IC

Write old password high Byte to R/W high Byte Try register

Write old password low Byte to R/W low Byte Try register

# now write new password into MTP

Write new password high Byte to high Byte MTP register

# password has changed! Must unlock to change the low byte

Write new password high Byte to R/W high Byte Try register

Write new password low Byte to low Byte MTP register

# password change complete, status is locked

#Need to write new low byte to Try register to unlock

Pin Protection

The ADDR_PROT pin is a dual function pin. When the

IC is enabled, the resistor value is latched and stored for

use in the I2C address offset function. Thereafter, the pin

acts entirely as a PROTECT pin. If enabled, the PROTECT pin

must be driven high to unlock and low to lock. Note,

if the resistor address offset function is being used, care

must be taken to allow the IC to read the resistor value

before driving the pin high or low to set the security state

otherwise an erroneous address offset value may be

latched in. The user should wait until at least the

completion of the auto‐trim time t4 in Figure 8.

GAMER MODE & MARGINING

IR36021 supports a PMBus gamer command for flexible

over‐clocking over an extended VID range. System

firmware can use this command to enable and disable

“Gamer Mode”. When Gamer mode is enabled, the output

voltage transitions from the current value to the value

specified by the Gamer command .

The Gamer VID is represented as a 9‐bit word given by the

formula:

Stepsize

where

MAX

VID

for

Stepsize

)

VID

(

Gamer

460









The designer may also configure a maximum Vout (Table

32) to protect the VR from exceeding the programmed

voltage regardless of the commanded VID and offset.

The Gamer command may be used to set the controller to

either override or track the current VID (set by manual_VID

registers). In Override mode, the IR36021 sets the output

voltage defined by the Gamer VID and ignores the

manual_VID registers. In Track mode, the output voltage is

initially set to the Gamer VID and any subsequent changes

to the manual_VID registers cause the same offset changes

in the Gamer VID.

The IR36021 Gamer command also provides overclockers

the ability to minimize droop by digitally scaling the

loadline to 80%, 60% or 0% (disable) of the nominal value.

A summary of the PMBus Gamer command is shown in

Table 33.

Note that sending a Gamer command does not change the

output voltage when the device is in margining mode. The

command will take effect when the device comes out of

margining mode.

IR36021 Datasheet(PDF) 33 Page - International Rectifier

IR36021 Datasheet(HTML) 33 Page - International Rectifier

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